Search

Chris C. Chu

Examiner (ID: 8603)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
1003
Issued Applications
778
Pending Applications
1
Abandoned Applications
227

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8257540 [patent_doc_number] => 08207018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/903482 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12903482 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903482
Semiconductor package Oct 12, 2010 Issued
Array ( [id] => 6120964 [patent_doc_number] => 20110084410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'Wiring Substrate for a Semiconductor Chip, and Semiconducotor Package Having the Wiring Substrate' [patent_app_type] => utility [patent_app_number] => 12/901129 [patent_app_country] => US [patent_app_date] => 2010-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6960 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084410.pdf [firstpage_image] =>[orig_patent_app_number] => 12901129 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/901129
Wiring substrate for a semiconductor chip, and semiconducotor package having the wiring substrate Oct 7, 2010 Issued
Array ( [id] => 6120881 [patent_doc_number] => 20110084382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'CHIP PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/900190 [patent_app_country] => US [patent_app_date] => 2010-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3867 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084382.pdf [firstpage_image] =>[orig_patent_app_number] => 12900190 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/900190
Chip package and fabrication method thereof Oct 6, 2010 Issued
Array ( [id] => 8592512 [patent_doc_number] => 08350389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Semiconductor device and information processing system including the same' [patent_app_type] => utility [patent_app_number] => 12/923789 [patent_app_country] => US [patent_app_date] => 2010-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 12851 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12923789 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923789
Semiconductor device and information processing system including the same Oct 6, 2010 Issued
Array ( [id] => 8244840 [patent_doc_number] => 08202763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device' [patent_app_type] => utility [patent_app_number] => 12/899642 [patent_app_country] => US [patent_app_date] => 2010-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 36 [patent_no_of_words] => 5998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/202/08202763.pdf [firstpage_image] =>[orig_patent_app_number] => 12899642 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899642
Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device Oct 6, 2010 Issued
Array ( [id] => 8202950 [patent_doc_number] => 08188575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Apparatus and method for uniform metal plating' [patent_app_type] => utility [patent_app_number] => 12/898622 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 35 [patent_no_of_words] => 13550 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/188/08188575.pdf [firstpage_image] =>[orig_patent_app_number] => 12898622 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/898622
Apparatus and method for uniform metal plating Oct 4, 2010 Issued
Array ( [id] => 8190295 [patent_doc_number] => 08183693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-22 [patent_title] => 'Electronic device, method of producing the same, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/897173 [patent_app_country] => US [patent_app_date] => 2010-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 6029 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/183/08183693.pdf [firstpage_image] =>[orig_patent_app_number] => 12897173 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/897173
Electronic device, method of producing the same, and semiconductor device Oct 3, 2010 Issued
Array ( [id] => 5993096 [patent_doc_number] => 20110014749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Method for Packaging Semiconductor Dies Having Through-Silicon Vias' [patent_app_type] => utility [patent_app_number] => 12/883910 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2216 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20110014749.pdf [firstpage_image] =>[orig_patent_app_number] => 12883910 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883910
Method for packaging semiconductor dies having through-silicon vias Sep 15, 2010 Issued
Array ( [id] => 8165843 [patent_doc_number] => 08174126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Stacked multi-chip' [patent_app_type] => utility [patent_app_number] => 12/882805 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1283 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/174/08174126.pdf [firstpage_image] =>[orig_patent_app_number] => 12882805 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882805
Stacked multi-chip Sep 14, 2010 Issued
Array ( [id] => 9504285 [patent_doc_number] => 08742603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC)' [patent_app_type] => utility [patent_app_number] => 12/882525 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 3916 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12882525 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882525
Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC) Sep 14, 2010 Issued
Array ( [id] => 7815239 [patent_doc_number] => 20120061859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULANT CONTAINMENT AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/882856 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061859.pdf [firstpage_image] =>[orig_patent_app_number] => 12882856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882856
Integrated circuit packaging system with encapsulant containment and method of manufacture thereof Sep 14, 2010 Issued
Array ( [id] => 6007549 [patent_doc_number] => 20110059580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'HIGH-POWER SEMICONDUCTOR DIE PACKAGES WITH INTEGRATED HEAT-SINK CAPABILITY AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/883044 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6585 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20110059580.pdf [firstpage_image] =>[orig_patent_app_number] => 12883044 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883044
High-power semiconductor die packages with integrated heat-sink capability and methods of manufacturing the same Sep 14, 2010 Issued
Array ( [id] => 7815234 [patent_doc_number] => 20120061854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/881983 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061854.pdf [firstpage_image] =>[orig_patent_app_number] => 12881983 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881983
Integrated circuit packaging system with package-on-package and method of manufacture thereof Sep 13, 2010 Issued
Array ( [id] => 7815237 [patent_doc_number] => 20120061857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Electronic Packaging With A Variable Thickness Mold Cap' [patent_app_type] => utility [patent_app_number] => 12/881549 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2767 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061857.pdf [firstpage_image] =>[orig_patent_app_number] => 12881549 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881549
Electronic packaging with a variable thickness mold cap Sep 13, 2010 Issued
Array ( [id] => 7815235 [patent_doc_number] => 20120061855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/882067 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061855.pdf [firstpage_image] =>[orig_patent_app_number] => 12882067 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882067
Integrated circuit packaging system with film encapsulation and method of manufacture thereof Sep 13, 2010 Issued
Array ( [id] => 7815238 [patent_doc_number] => 20120061858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Semiconductor Device and Method of Forming Mold Underfill Using Dispensing Needle Having Same Width as Semiconductor Die' [patent_app_type] => utility [patent_app_number] => 12/882083 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4677 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061858.pdf [firstpage_image] =>[orig_patent_app_number] => 12882083 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882083
Semiconductor device and method of forming mold underfill using dispensing needle having same width as semiconductor die Sep 13, 2010 Issued
Array ( [id] => 4644924 [patent_doc_number] => 08022531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Integrated circuit package system using heat slug' [patent_app_type] => utility [patent_app_number] => 12/880415 [patent_app_country] => US [patent_app_date] => 2010-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 3955 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022531.pdf [firstpage_image] =>[orig_patent_app_number] => 12880415 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/880415
Integrated circuit package system using heat slug Sep 12, 2010 Issued
Array ( [id] => 6327517 [patent_doc_number] => 20100327307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Optoelectronic Component' [patent_app_type] => utility [patent_app_number] => 12/879130 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3745 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327307.pdf [firstpage_image] =>[orig_patent_app_number] => 12879130 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879130
Optoelectronic component Sep 9, 2010 Issued
Array ( [id] => 6004156 [patent_doc_number] => 20110057309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'STRUCTURE, METHOD AND SYSTEM FOR ASSESSING BONDING OF ELECTRODES IN FCB PACKAGING' [patent_app_type] => utility [patent_app_number] => 12/877661 [patent_app_country] => US [patent_app_date] => 2010-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5502 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20110057309.pdf [firstpage_image] =>[orig_patent_app_number] => 12877661 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/877661
Structure, method and system for assessing bonding of electrodes in FCB packaging Sep 7, 2010 Issued
Array ( [id] => 8283393 [patent_doc_number] => 08217492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Inductively coupled integrated circuit with magnetic communication path and methods for use therewith' [patent_app_type] => utility [patent_app_number] => 12/841108 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 76 [patent_no_of_words] => 29582 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12841108 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/841108
Inductively coupled integrated circuit with magnetic communication path and methods for use therewith Jul 20, 2010 Issued
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