Search

Chris C. Chu

Examiner (ID: 19280)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
1003
Issued Applications
778
Pending Applications
1
Abandoned Applications
227

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9608086 [patent_doc_number] => 08785251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Semiconductor device and method of forming mold underfill using dispensing needle having same width as semiconductor die' [patent_app_type] => utility [patent_app_number] => 14/020996 [patent_app_country] => US [patent_app_date] => 2013-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 4625 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14020996 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/020996
Semiconductor device and method of forming mold underfill using dispensing needle having same width as semiconductor die Sep 8, 2013 Issued
Array ( [id] => 9626413 [patent_doc_number] => 08796091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Three-dimensional semiconductor memory devices' [patent_app_type] => utility [patent_app_number] => 14/012588 [patent_app_country] => US [patent_app_date] => 2013-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 73 [patent_no_of_words] => 12260 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14012588 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/012588
Three-dimensional semiconductor memory devices Aug 27, 2013 Issued
Array ( [id] => 9350763 [patent_doc_number] => 08669657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-11 [patent_title] => 'Stackable semiconductor assemblies and methods of manufacturing such assemblies' [patent_app_type] => utility [patent_app_number] => 14/010685 [patent_app_country] => US [patent_app_date] => 2013-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5334 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14010685 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/010685
Stackable semiconductor assemblies and methods of manufacturing such assemblies Aug 26, 2013 Issued
Array ( [id] => 9691674 [patent_doc_number] => 08822268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-02 [patent_title] => 'Redistributed chip packages containing multiple components and methods for the fabrication thereof' [patent_app_type] => utility [patent_app_number] => 13/944774 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944774 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944774
Redistributed chip packages containing multiple components and methods for the fabrication thereof Jul 16, 2013 Issued
Array ( [id] => 9703746 [patent_doc_number] => 08828807 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-09 [patent_title] => 'Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound' [patent_app_type] => utility [patent_app_number] => 13/944260 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 3514 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944260 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944260
Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound Jul 16, 2013 Issued
Array ( [id] => 10832056 [patent_doc_number] => 08860229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-14 [patent_title] => 'Hybrid bonding with through substrate via (TSV)' [patent_app_type] => utility [patent_app_number] => 13/943401 [patent_app_country] => US [patent_app_date] => 2013-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943401
Hybrid bonding with through substrate via (TSV) Jul 15, 2013 Issued
Array ( [id] => 10857365 [patent_doc_number] => 08883562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Reconstituted wafer stack packaging with after-applied pad extensions' [patent_app_type] => utility [patent_app_number] => 13/911555 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8740 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911555 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911555
Reconstituted wafer stack packaging with after-applied pad extensions Jun 5, 2013 Issued
Array ( [id] => 9081533 [patent_doc_number] => 20130267063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/909727 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7189 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909727 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909727
Method for fabricating a semiconductor device and semiconductor package Jun 3, 2013 Issued
Array ( [id] => 9355242 [patent_doc_number] => 08673775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Methods of forming semiconductor structures' [patent_app_type] => utility [patent_app_number] => 13/905302 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5055 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13905302 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/905302
Methods of forming semiconductor structures May 29, 2013 Issued
Array ( [id] => 9038428 [patent_doc_number] => 20130241066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'BARRIER LAYER FOR INTEGRATED CIRCUIT CONTACTS' [patent_app_type] => utility [patent_app_number] => 13/890023 [patent_app_country] => US [patent_app_date] => 2013-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1718 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890023 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/890023
Barrier layer for integrated circuit contacts May 7, 2013 Issued
Array ( [id] => 9031690 [patent_doc_number] => 20130234328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'METHODS OF FLUXLESS MICRO-PIERCING OF SOLDER BALLS, AND RESULTING DEVICES' [patent_app_type] => utility [patent_app_number] => 13/873509 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873509 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873509
Methods of fluxless micro-piercing of solder balls, and resulting devices Apr 29, 2013 Issued
Array ( [id] => 9355158 [patent_doc_number] => 08673691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/867613 [patent_app_country] => US [patent_app_date] => 2013-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 14625 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13867613 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/867613
Method for manufacturing a semiconductor device Apr 21, 2013 Issued
Array ( [id] => 9184433 [patent_doc_number] => 08624371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor' [patent_app_type] => utility [patent_app_number] => 13/866538 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 5994 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866538 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/866538
Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor Apr 18, 2013 Issued
Array ( [id] => 9086964 [patent_doc_number] => 08558394 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-15 [patent_title] => 'Chip stack structure and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/859783 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 4068 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859783 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859783
Chip stack structure and manufacturing method thereof Apr 9, 2013 Issued
Array ( [id] => 9324148 [patent_doc_number] => 08659174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/851993 [patent_app_country] => US [patent_app_date] => 2013-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7882 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13851993 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/851993
Semiconductor device Mar 27, 2013 Issued
Array ( [id] => 9227904 [patent_doc_number] => 08633574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-21 [patent_title] => 'Organic electronic packages having hermetically sealed edges and methods of manufacturing such packages' [patent_app_type] => utility [patent_app_number] => 13/801505 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5483 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13801505 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/801505
Organic electronic packages having hermetically sealed edges and methods of manufacturing such packages Mar 12, 2013 Issued
Array ( [id] => 9446398 [patent_doc_number] => 20140117566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING LINE-TYPE TRENCH TO DEFINE ACTIVE REGION AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/763927 [patent_app_country] => US [patent_app_date] => 2013-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 12714 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13763927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/763927
Semiconductor device having line-type trench to define active region and method of forming the same Feb 10, 2013 Issued
Array ( [id] => 9654267 [patent_doc_number] => 20140225272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'EMBEDDED ELECTRONIC DEVICE PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/762385 [patent_app_country] => US [patent_app_date] => 2013-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3046 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762385 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762385
Embedded electronic device package structure Feb 7, 2013 Issued
Array ( [id] => 9639465 [patent_doc_number] => 20140217575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => '3DIC Package Comprising Perforated Foil Sheet' [patent_app_type] => utility [patent_app_number] => 13/762214 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762214 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762214
3DIC package comprising perforated foil sheet Feb 6, 2013 Issued
Array ( [id] => 10893364 [patent_doc_number] => 08916979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Through-vias and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/762248 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2891 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762248
Through-vias and methods of forming the same Feb 6, 2013 Issued
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