Search

Chris C. Chu

Examiner (ID: 11832)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
1003
Issued Applications
778
Pending Applications
1
Abandoned Applications
227

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 788380 [patent_doc_number] => 06987313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 09/740902 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4719 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/987/06987313.pdf [firstpage_image] =>[orig_patent_app_number] => 09740902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740902
Semiconductor device Dec 20, 2000 Issued
Array ( [id] => 7627876 [patent_doc_number] => 06806561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Electronic apparatus' [patent_app_type] => B2 [patent_app_number] => 09/739634 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 36 [patent_no_of_words] => 6724 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806561.pdf [firstpage_image] =>[orig_patent_app_number] => 09739634 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/739634
Electronic apparatus Dec 19, 2000 Issued
Array ( [id] => 1197236 [patent_doc_number] => 06732345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Layout method using created via cell data in automated layout' [patent_app_type] => B2 [patent_app_number] => 09/739826 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8908 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732345.pdf [firstpage_image] =>[orig_patent_app_number] => 09739826 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/739826
Layout method using created via cell data in automated layout Dec 19, 2000 Issued
Array ( [id] => 6877242 [patent_doc_number] => 20010002728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-07 [patent_title] => 'Printed-circuit board and method of manufacture thereof' [patent_app_type] => new-utility [patent_app_number] => 09/740424 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3983 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002728.pdf [firstpage_image] =>[orig_patent_app_number] => 09740424 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740424
Printed-circuit board and method of manufacture thereof Dec 18, 2000 Issued
Array ( [id] => 6123545 [patent_doc_number] => 20020074637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Stacked flip chip assemblies' [patent_app_type] => new [patent_app_number] => 09/741370 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4840 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074637.pdf [firstpage_image] =>[orig_patent_app_number] => 09741370 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741370
Stacked flip chip assemblies Dec 18, 2000 Abandoned
Array ( [id] => 6060386 [patent_doc_number] => 20020030261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'Multi-flip-chip semiconductor assembly' [patent_app_type] => new [patent_app_number] => 09/737710 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4209 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20020030261.pdf [firstpage_image] =>[orig_patent_app_number] => 09737710 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737710
Multi-flip-chip semiconductor assembly Dec 17, 2000 Abandoned
Array ( [id] => 7040061 [patent_doc_number] => 20010005048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Circuit board arrangement' [patent_app_type] => new-utility [patent_app_number] => 09/737483 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1785 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005048.pdf [firstpage_image] =>[orig_patent_app_number] => 09737483 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737483
Circuit board arrangement Dec 17, 2000 Abandoned
Array ( [id] => 7104795 [patent_doc_number] => 20010004132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-21 [patent_title] => 'Method and an arrangement relating to chip carriers' [patent_app_type] => new-utility [patent_app_number] => 09/736321 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3027 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20010004132.pdf [firstpage_image] =>[orig_patent_app_number] => 09736321 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736321
Method and an arrangement relating to chip carriers Dec 14, 2000 Issued
Array ( [id] => 1040988 [patent_doc_number] => 06870255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-22 [patent_title] => 'Integrated circuit wiring architectures to support independent designs' [patent_app_type] => utility [patent_app_number] => 09/739582 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 7919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870255.pdf [firstpage_image] =>[orig_patent_app_number] => 09739582 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/739582
Integrated circuit wiring architectures to support independent designs Dec 14, 2000 Issued
Array ( [id] => 7026674 [patent_doc_number] => 20010013651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => new [patent_app_number] => 09/738554 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5121 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013651.pdf [firstpage_image] =>[orig_patent_app_number] => 09738554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/738554
Semiconductor device and manufacturing method therefor Dec 14, 2000 Abandoned
Array ( [id] => 6123572 [patent_doc_number] => 20020074652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Method, apparatus and system for multiple chip assemblies' [patent_app_type] => new [patent_app_number] => 09/738201 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2881 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074652.pdf [firstpage_image] =>[orig_patent_app_number] => 09738201 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/738201
Method, apparatus and system for multiple chip assemblies Dec 14, 2000 Abandoned
Array ( [id] => 1424714 [patent_doc_number] => 06507115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-14 [patent_title] => 'Multi-chip integrated circuit module' [patent_app_type] => B2 [patent_app_number] => 09/736584 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3258 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507115.pdf [firstpage_image] =>[orig_patent_app_number] => 09736584 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736584
Multi-chip integrated circuit module Dec 13, 2000 Issued
Array ( [id] => 6887315 [patent_doc_number] => 20010008309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-19 [patent_title] => 'Interconnection substrate having metal columns covered by a resin film, and manufacturing method thereof' [patent_app_type] => new-utility [patent_app_number] => 09/736864 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10486 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20010008309.pdf [firstpage_image] =>[orig_patent_app_number] => 09736864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736864
Interconnection substrate having metal columns covered by a resin film, and manufacturing method thereof Dec 13, 2000 Issued
Array ( [id] => 1169845 [patent_doc_number] => 06756666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Surface mount package including terminal on its side' [patent_app_type] => B2 [patent_app_number] => 09/734662 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 4387 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756666.pdf [firstpage_image] =>[orig_patent_app_number] => 09734662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734662
Surface mount package including terminal on its side Dec 12, 2000 Issued
Array ( [id] => 6205429 [patent_doc_number] => 20020070445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Enveloped thermal interface with metal matrix components' [patent_app_type] => new [patent_app_number] => 09/734552 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2349 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070445.pdf [firstpage_image] =>[orig_patent_app_number] => 09734552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734552
Enveloped thermal interface with metal matrix components Dec 12, 2000 Abandoned
Array ( [id] => 6881690 [patent_doc_number] => 20010048162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-06 [patent_title] => 'Semiconductor device having a structure of a multilayer interconnection unit and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 09/734204 [patent_app_country] => US [patent_app_date] => 2000-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5373 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20010048162.pdf [firstpage_image] =>[orig_patent_app_number] => 09734204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734204
Semiconductor device having a structure of a multilayer interconnection unit and manufacturing method thereof Dec 11, 2000 Abandoned
Array ( [id] => 7040075 [patent_doc_number] => 20010005051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Semiconductor package and semiconductor device' [patent_app_type] => new-utility [patent_app_number] => 09/734864 [patent_app_country] => US [patent_app_date] => 2000-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3970 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005051.pdf [firstpage_image] =>[orig_patent_app_number] => 09734864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734864
Semiconductor package and semiconductor device Dec 11, 2000 Abandoned
Array ( [id] => 7104797 [patent_doc_number] => 20010004134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-21 [patent_title] => 'Electronic device and method of producing same' [patent_app_type] => new-utility [patent_app_number] => 09/734412 [patent_app_country] => US [patent_app_date] => 2000-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5869 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20010004134.pdf [firstpage_image] =>[orig_patent_app_number] => 09734412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734412
Electronic device and method of producing same Dec 10, 2000 Issued
Array ( [id] => 7104790 [patent_doc_number] => 20010004128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-21 [patent_title] => 'Semiconductor package and manufacturing method thereof' [patent_app_type] => new-utility [patent_app_number] => 09/734832 [patent_app_country] => US [patent_app_date] => 2000-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7270 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20010004128.pdf [firstpage_image] =>[orig_patent_app_number] => 09734832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734832
Semiconductor package and manufacturing method thereof Dec 10, 2000 Abandoned
Array ( [id] => 6959579 [patent_doc_number] => 20010011763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Tab type semiconductor device' [patent_app_type] => new [patent_app_number] => 09/733623 [patent_app_country] => US [patent_app_date] => 2000-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20010011763.pdf [firstpage_image] =>[orig_patent_app_number] => 09733623 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/733623
Tab type semiconductor device Dec 6, 2000 Abandoned
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