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Chris C. Chu

Examiner (ID: 11832)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
1003
Issued Applications
778
Pending Applications
1
Abandoned Applications
227

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1410491 [patent_doc_number] => 06534846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Lead frame for semiconductor device and semiconductor device using same' [patent_app_type] => B1 [patent_app_number] => 09/435643 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6134 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534846.pdf [firstpage_image] =>[orig_patent_app_number] => 09435643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435643
Lead frame for semiconductor device and semiconductor device using same Nov 8, 1999 Issued
Array ( [id] => 1060245 [patent_doc_number] => 06853086 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument' [patent_app_type] => utility [patent_app_number] => 09/582351 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853086.pdf [firstpage_image] =>[orig_patent_app_number] => 09582351 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/582351
Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument Oct 27, 1999 Issued
Array ( [id] => 1169900 [patent_doc_number] => 06756674 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same' [patent_app_type] => B1 [patent_app_number] => 09/426061 [patent_app_country] => US [patent_app_date] => 1999-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6473 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756674.pdf [firstpage_image] =>[orig_patent_app_number] => 09426061 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426061
Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same Oct 21, 1999 Issued
09/418051 RECONFIGURABLE PINOUT BALL GRID ARRAY Oct 13, 1999 Abandoned
Array ( [id] => 6444193 [patent_doc_number] => 20020149027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND ITS MANUFACTURE, AND SEMICONDUCTOR DEVICE PACKAGING STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/381232 [patent_app_country] => US [patent_app_date] => 1999-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10363 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149027.pdf [firstpage_image] =>[orig_patent_app_number] => 09381232 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/381232
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE, AND SEMICONDUCTOR DEVICE PACKAGING STRUCTURE Sep 16, 1999 Abandoned
Array ( [id] => 1495515 [patent_doc_number] => 06342732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Chip-type multilayer electronic part' [patent_app_type] => B1 [patent_app_number] => 09/397013 [patent_app_country] => US [patent_app_date] => 1999-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2816 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/342/06342732.pdf [firstpage_image] =>[orig_patent_app_number] => 09397013 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397013
Chip-type multilayer electronic part Sep 14, 1999 Issued
Array ( [id] => 4318229 [patent_doc_number] => 06316834 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Tungsten plugs for integrated circuits and method for making same' [patent_app_type] => 1 [patent_app_number] => 9/392343 [patent_app_country] => US [patent_app_date] => 1999-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5238 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316834.pdf [firstpage_image] =>[orig_patent_app_number] => 392343 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/392343
Tungsten plugs for integrated circuits and method for making same Sep 7, 1999 Issued
Array ( [id] => 6507208 [patent_doc_number] => 20020135070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'INTEGRATED CIRCUITS HAVING PLUGS IN CONDUCTIVE LAYERS THEREIN AND RELATED METHODS' [patent_app_type] => new [patent_app_number] => 09/388901 [patent_app_country] => US [patent_app_date] => 1999-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3347 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20020135070.pdf [firstpage_image] =>[orig_patent_app_number] => 09388901 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/388901
Integrated circuits having plugs in conductive layers therein and related methods Sep 1, 1999 Issued
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