Search

Christian Chace

Supervisory Patent Examiner (ID: 19863, Phone: (571)272-4190 , Office: P/2131 )

Most Active Art Unit
2186
Art Unit(s)
2129, 2186, 2752, 2189, 3665, 2187, 2131, 2165
Total Applications
437
Issued Applications
346
Pending Applications
23
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4735473 [patent_doc_number] => 20080052455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Method and System for Mapping Disk Drives in a Shared Disk Cluster' [patent_app_type] => utility [patent_app_number] => 11/467703 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20080052455.pdf [firstpage_image] =>[orig_patent_app_number] => 11467703 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/467703
Method and System for Mapping Disk Drives in a Shared Disk Cluster Aug 27, 2006 Abandoned
Array ( [id] => 5132507 [patent_doc_number] => 20070208904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Wear leveling method and apparatus for nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 11/366582 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4791 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20070208904.pdf [firstpage_image] =>[orig_patent_app_number] => 11366582 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/366582
Wear leveling method and apparatus for nonvolatile memory Mar 2, 2006 Pending
Array ( [id] => 662972 [patent_doc_number] => 07107429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Data access in a processor' [patent_app_type] => utility [patent_app_number] => 11/364927 [patent_app_country] => US [patent_app_date] => 2006-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7522 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107429.pdf [firstpage_image] =>[orig_patent_app_number] => 11364927 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364927
Data access in a processor Feb 28, 2006 Issued
Array ( [id] => 645548 [patent_doc_number] => 07124270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Transceiver with latency alignment circuitry' [patent_app_type] => utility [patent_app_number] => 11/078577 [patent_app_country] => US [patent_app_date] => 2005-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6322 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/124/07124270.pdf [firstpage_image] =>[orig_patent_app_number] => 11078577 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/078577
Transceiver with latency alignment circuitry Mar 10, 2005 Issued
Array ( [id] => 7077149 [patent_doc_number] => 20050149685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Transceiver with latency alignment circuitry' [patent_app_type] => utility [patent_app_number] => 11/058333 [patent_app_country] => US [patent_app_date] => 2005-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6258 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20050149685.pdf [firstpage_image] =>[orig_patent_app_number] => 11058333 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/058333
Transceiver with latency alignment circuitry Feb 14, 2005 Issued
Array ( [id] => 7076801 [patent_doc_number] => 20050149591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Method and apparatus for generating deterministic, non-repeating, pseudo-random addresses' [patent_app_type] => utility [patent_app_number] => 11/057596 [patent_app_country] => US [patent_app_date] => 2005-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4317 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20050149591.pdf [firstpage_image] =>[orig_patent_app_number] => 11057596 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/057596
Method and apparatus for generating deterministic, non-repeating, pseudo-random addresses Feb 14, 2005 Issued
Array ( [id] => 6974030 [patent_doc_number] => 20050039106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Device and method for minimizing puncturing-caused output delay' [patent_app_type] => utility [patent_app_number] => 10/950778 [patent_app_country] => US [patent_app_date] => 2004-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4836 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20050039106.pdf [firstpage_image] =>[orig_patent_app_number] => 10950778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/950778
Device and method for minimizing puncturing-caused output delay Sep 26, 2004 Issued
Array ( [id] => 7091780 [patent_doc_number] => 20050010736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'System and method for using a using vendor-long descriptor in ACPI for the chipset registers' [patent_app_type] => utility [patent_app_number] => 10/915358 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3803 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010736.pdf [firstpage_image] =>[orig_patent_app_number] => 10915358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915358
System and method for using a vendor-long descriptor in ACPI for the chipset registers Aug 10, 2004 Issued
Array ( [id] => 568298 [patent_doc_number] => 07171528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Method and apparatus for generating a write mask key' [patent_app_type] => utility [patent_app_number] => 10/896167 [patent_app_country] => US [patent_app_date] => 2004-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 18569 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/171/07171528.pdf [firstpage_image] =>[orig_patent_app_number] => 10896167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/896167
Method and apparatus for generating a write mask key Jul 20, 2004 Issued
Array ( [id] => 7321188 [patent_doc_number] => 20040225826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Transportation of main memory and intermediate memory contents' [patent_app_type] => new [patent_app_number] => 10/861718 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2247 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225826.pdf [firstpage_image] =>[orig_patent_app_number] => 10861718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861718
Transportation of main memory and intermediate memory contents Jun 3, 2004 Issued
Array ( [id] => 641051 [patent_doc_number] => 07127535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-24 [patent_title] => 'System and method for multiplexed data back-up' [patent_app_type] => utility [patent_app_number] => 10/831791 [patent_app_country] => US [patent_app_date] => 2004-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4827 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/127/07127535.pdf [firstpage_image] =>[orig_patent_app_number] => 10831791 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/831791
System and method for multiplexed data back-up Apr 25, 2004 Issued
Array ( [id] => 981634 [patent_doc_number] => 06931509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Address mapping in solid state storage device' [patent_app_type] => utility [patent_app_number] => 10/734624 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7215 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931509.pdf [firstpage_image] =>[orig_patent_app_number] => 10734624 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734624
Address mapping in solid state storage device Dec 14, 2003 Issued
Array ( [id] => 771334 [patent_doc_number] => 07010658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Transceiver with latency alignment circuitry' [patent_app_type] => utility [patent_app_number] => 10/699116 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6286 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010658.pdf [firstpage_image] =>[orig_patent_app_number] => 10699116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/699116
Transceiver with latency alignment circuitry Oct 30, 2003 Issued
Array ( [id] => 1109787 [patent_doc_number] => 06813696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => B2 [patent_app_number] => 10/694982 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 38 [patent_no_of_words] => 23879 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813696.pdf [firstpage_image] =>[orig_patent_app_number] => 10694982 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/694982
Semiconductor memory device and method of controlling the same Oct 28, 2003 Issued
Array ( [id] => 739628 [patent_doc_number] => 07039782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Memory system with channel multiplexing of multiple memory devices' [patent_app_type] => utility [patent_app_number] => 10/690402 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9031 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039782.pdf [firstpage_image] =>[orig_patent_app_number] => 10690402 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690402
Memory system with channel multiplexing of multiple memory devices Oct 19, 2003 Issued
Array ( [id] => 7271366 [patent_doc_number] => 20040059884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Data storage medium with certification data' [patent_app_type] => new [patent_app_number] => 10/669420 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 12388 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059884.pdf [firstpage_image] =>[orig_patent_app_number] => 10669420 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/669420
Data storage medium with certification data Sep 24, 2003 Issued
Array ( [id] => 7393751 [patent_doc_number] => 20040030836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Management of caches in a data processing apparatus' [patent_app_type] => new [patent_app_number] => 10/635684 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7315 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20040030836.pdf [firstpage_image] =>[orig_patent_app_number] => 10635684 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/635684
Management of caches in a data processing apparatus Aug 6, 2003 Issued
Array ( [id] => 679918 [patent_doc_number] => 07089347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Computer system for managing performances of storage apparatus and performance management method of the computer system' [patent_app_type] => utility [patent_app_number] => 10/633637 [patent_app_country] => US [patent_app_date] => 2003-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 31457 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089347.pdf [firstpage_image] =>[orig_patent_app_number] => 10633637 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633637
Computer system for managing performances of storage apparatus and performance management method of the computer system Aug 4, 2003 Issued
Array ( [id] => 789395 [patent_doc_number] => 06988175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Flash memory management method that is resistant to data corruption by power loss' [patent_app_type] => utility [patent_app_number] => 10/608189 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6351 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988175.pdf [firstpage_image] =>[orig_patent_app_number] => 10608189 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/608189
Flash memory management method that is resistant to data corruption by power loss Jun 29, 2003 Issued
Array ( [id] => 779808 [patent_doc_number] => 06995542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Battery charger amusement device' [patent_app_type] => utility [patent_app_number] => 10/600260 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2320 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995542.pdf [firstpage_image] =>[orig_patent_app_number] => 10600260 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600260
Battery charger amusement device Jun 19, 2003 Issued
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