Search

Christian Chace

Supervisory Patent Examiner (ID: 19863, Phone: (571)272-4190 , Office: P/2131 )

Most Active Art Unit
2186
Art Unit(s)
2129, 2186, 2752, 2189, 3665, 2187, 2131, 2165
Total Applications
437
Issued Applications
346
Pending Applications
23
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6852975 [patent_doc_number] => 20030145178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Circuit and method for detecting multiple matches in a content addressable memory' [patent_app_type] => new [patent_app_number] => 10/208012 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2663 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20030145178.pdf [firstpage_image] =>[orig_patent_app_number] => 10208012 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/208012
Circuit and method for detecting multiple matches in a content addressable memory Jul 30, 2002 Abandoned
Array ( [id] => 649009 [patent_doc_number] => 07120728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Hardware-based translating virtualization switch' [patent_app_type] => utility [patent_app_number] => 10/209694 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 44 [patent_no_of_words] => 16181 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120728.pdf [firstpage_image] =>[orig_patent_app_number] => 10209694 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/209694
Hardware-based translating virtualization switch Jul 30, 2002 Issued
Array ( [id] => 1020935 [patent_doc_number] => 06892287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-10 [patent_title] => 'Frame reassembly in an ATM network analyzer' [patent_app_type] => utility [patent_app_number] => 10/209490 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 9319 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/892/06892287.pdf [firstpage_image] =>[orig_patent_app_number] => 10209490 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/209490
Frame reassembly in an ATM network analyzer Jul 30, 2002 Issued
Array ( [id] => 1431157 [patent_doc_number] => 06523088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-18 [patent_title] => 'Disk array controller with connection path formed on connection request queue basis' [patent_app_type] => B2 [patent_app_number] => 10/189238 [patent_app_country] => US [patent_app_date] => 2002-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 5799 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/523/06523088.pdf [firstpage_image] =>[orig_patent_app_number] => 10189238 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/189238
Disk array controller with connection path formed on connection request queue basis Jul 4, 2002 Issued
Array ( [id] => 7372573 [patent_doc_number] => 20040006680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Method and apparatus for generating deterministic, non-repeating, pseudo-random addresses' [patent_app_type] => new [patent_app_number] => 10/183370 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4352 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20040006680.pdf [firstpage_image] =>[orig_patent_app_number] => 10183370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183370
Method and apparatus for generating deterministic, non-repeating, pseudo-random addresses Jun 27, 2002 Issued
Array ( [id] => 1124930 [patent_doc_number] => 06799261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Memory interface with fractional addressing' [patent_app_type] => B2 [patent_app_number] => 10/184582 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3443 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/799/06799261.pdf [firstpage_image] =>[orig_patent_app_number] => 10184582 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184582
Memory interface with fractional addressing Jun 27, 2002 Issued
Array ( [id] => 6826328 [patent_doc_number] => 20030236950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Distributed storage cache coherency system and method' [patent_app_type] => new [patent_app_number] => 10/177944 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4490 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236950.pdf [firstpage_image] =>[orig_patent_app_number] => 10177944 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/177944
Distributed storage cache coherency system and method Jun 19, 2002 Issued
Array ( [id] => 6826333 [patent_doc_number] => 20030236955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Fast aging scheme for search engine databases using a linear feedback shift register' [patent_app_type] => new [patent_app_number] => 10/177895 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4233 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236955.pdf [firstpage_image] =>[orig_patent_app_number] => 10177895 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/177895
Fast aging scheme for search engine databases using a linear feedback shift register Jun 19, 2002 Issued
Array ( [id] => 7611341 [patent_doc_number] => 06904501 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'Cache memory for identifying locked and least recently used storage locations' [patent_app_type] => utility [patent_app_number] => 10/174391 [patent_app_country] => US [patent_app_date] => 2002-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2038 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/904/06904501.pdf [firstpage_image] =>[orig_patent_app_number] => 10174391 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/174391
Cache memory for identifying locked and least recently used storage locations Jun 16, 2002 Issued
Array ( [id] => 6717385 [patent_doc_number] => 20030028733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Memory apparatus' [patent_app_type] => new [patent_app_number] => 10/172096 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12660 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028733.pdf [firstpage_image] =>[orig_patent_app_number] => 10172096 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172096
Transferring data between volatile and non-volatile memories based on system parameters using a controller Jun 12, 2002 Issued
Array ( [id] => 1595932 [patent_doc_number] => 06484248 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method of operating a memory device having decoupled address and data access' [patent_app_type] => B1 [patent_app_number] => 10/163561 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7275 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484248.pdf [firstpage_image] =>[orig_patent_app_number] => 10163561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163561
Method of operating a memory device having decoupled address and data access Jun 5, 2002 Issued
Array ( [id] => 706754 [patent_doc_number] => 07065628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Increasing memory access efficiency for packet applications' [patent_app_type] => utility [patent_app_number] => 10/158409 [patent_app_country] => US [patent_app_date] => 2002-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3484 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/065/07065628.pdf [firstpage_image] =>[orig_patent_app_number] => 10158409 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/158409
Increasing memory access efficiency for packet applications May 28, 2002 Issued
Array ( [id] => 626376 [patent_doc_number] => 07139890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Methods and arrangements to interface memory' [patent_app_type] => utility [patent_app_number] => 10/135149 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9098 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139890.pdf [firstpage_image] =>[orig_patent_app_number] => 10135149 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135149
Methods and arrangements to interface memory Apr 29, 2002 Issued
Array ( [id] => 1020931 [patent_doc_number] => 06892285 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-10 [patent_title] => 'System and method for operating a packet buffer' [patent_app_type] => utility [patent_app_number] => 10/135603 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6509 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/892/06892285.pdf [firstpage_image] =>[orig_patent_app_number] => 10135603 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135603
System and method for operating a packet buffer Apr 29, 2002 Issued
Array ( [id] => 6665350 [patent_doc_number] => 20030204677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Storage cache descriptor' [patent_app_type] => new [patent_app_number] => 10/135209 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3908 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20030204677.pdf [firstpage_image] =>[orig_patent_app_number] => 10135209 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135209
Data storage apparatus, system and method including a cache descriptor having a field defining data in a cache block Apr 29, 2002 Issued
Array ( [id] => 6565450 [patent_doc_number] => 20020112121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Network server platform/facilities management platform caching server' [patent_app_type] => new [patent_app_number] => 10/122176 [patent_app_country] => US [patent_app_date] => 2002-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7599 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20020112121.pdf [firstpage_image] =>[orig_patent_app_number] => 10122176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/122176
Network server platform/facilities management platform caching server Apr 15, 2002 Abandoned
Array ( [id] => 675969 [patent_doc_number] => 07093086 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-15 [patent_title] => 'Disaster recovery and backup using virtual machines' [patent_app_type] => utility [patent_app_number] => 10/109186 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8506 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/093/07093086.pdf [firstpage_image] =>[orig_patent_app_number] => 10109186 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/109186
Disaster recovery and backup using virtual machines Mar 27, 2002 Issued
Array ( [id] => 978751 [patent_doc_number] => 06934826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'System and method for dynamically allocating memory and managing memory allocated to logging in a storage area network' [patent_app_type] => utility [patent_app_number] => 10/106904 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10024 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934826.pdf [firstpage_image] =>[orig_patent_app_number] => 10106904 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106904
System and method for dynamically allocating memory and managing memory allocated to logging in a storage area network Mar 25, 2002 Issued
Array ( [id] => 1033714 [patent_doc_number] => 06880052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Storage area network, data replication and storage controller, and method for replicating data using virtualized volumes' [patent_app_type] => utility [patent_app_number] => 10/106906 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/880/06880052.pdf [firstpage_image] =>[orig_patent_app_number] => 10106906 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106906
Storage area network, data replication and storage controller, and method for replicating data using virtualized volumes Mar 25, 2002 Issued
Array ( [id] => 721651 [patent_doc_number] => 07054993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-30 [patent_title] => 'Ternary content addressable memory device' [patent_app_type] => utility [patent_app_number] => 10/055058 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 15231 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/054/07054993.pdf [firstpage_image] =>[orig_patent_app_number] => 10055058 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/055058
Ternary content addressable memory device Jan 21, 2002 Issued
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