Search

Christian Chace

Supervisory Patent Examiner (ID: 19863, Phone: (571)272-4190 , Office: P/2131 )

Most Active Art Unit
2186
Art Unit(s)
2129, 2186, 2752, 2189, 3665, 2187, 2131, 2165
Total Applications
437
Issued Applications
346
Pending Applications
23
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1037142 [patent_doc_number] => 06877077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Memory controller and method using read and write queues and an ordering queue for dispatching read and write memory requests out of order to reduce memory latency' [patent_app_type] => utility [patent_app_number] => 10/020565 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6231 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/877/06877077.pdf [firstpage_image] =>[orig_patent_app_number] => 10020565 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/020565
Memory controller and method using read and write queues and an ordering queue for dispatching read and write memory requests out of order to reduce memory latency Dec 6, 2001 Issued
Array ( [id] => 6211533 [patent_doc_number] => 20020073272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Method of programming a multi-flash memory system' [patent_app_type] => new [patent_app_number] => 10/007083 [patent_app_country] => US [patent_app_date] => 2001-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20020073272.pdf [firstpage_image] =>[orig_patent_app_number] => 10007083 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007083
Method of programming a multi-flash memory system Dec 5, 2001 Abandoned
Array ( [id] => 1062252 [patent_doc_number] => 06854054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'System and method of memory management for providing data storage across a reboot' [patent_app_type] => utility [patent_app_number] => 10/006293 [patent_app_country] => US [patent_app_date] => 2001-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7464 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/854/06854054.pdf [firstpage_image] =>[orig_patent_app_number] => 10006293 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006293
System and method of memory management for providing data storage across a reboot Dec 5, 2001 Issued
Array ( [id] => 7610030 [patent_doc_number] => 06842829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method and apparatus to manage independent memory systems as a shared volume' [patent_app_type] => utility [patent_app_number] => 10/006162 [patent_app_country] => US [patent_app_date] => 2001-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2871 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842829.pdf [firstpage_image] =>[orig_patent_app_number] => 10006162 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006162
Method and apparatus to manage independent memory systems as a shared volume Dec 5, 2001 Issued
Array ( [id] => 6655395 [patent_doc_number] => 20030105914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Remote memory address translation' [patent_app_type] => new [patent_app_number] => 10/007154 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5949 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105914.pdf [firstpage_image] =>[orig_patent_app_number] => 10007154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007154
System for accessing a region of memory using remote address translation and using a memory window table and a memory region table Dec 3, 2001 Issued
Array ( [id] => 6085499 [patent_doc_number] => 20020083266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Image data organization into pixel tile memory matrix' [patent_app_type] => new [patent_app_number] => 09/998782 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1657 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20020083266.pdf [firstpage_image] =>[orig_patent_app_number] => 09998782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998782
Image data processing system and method with image data organization into tile cache memory Dec 2, 2001 Issued
Array ( [id] => 6655461 [patent_doc_number] => 20030105935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and apparatus for accessing ROM PCI memory above 64 K' [patent_app_type] => new [patent_app_number] => 09/997776 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4397 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105935.pdf [firstpage_image] =>[orig_patent_app_number] => 09997776 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997776
Method and apparatus for accessing ROM PCI memory above 64 K Nov 29, 2001 Issued
Array ( [id] => 5830433 [patent_doc_number] => 20020069317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'E-RAID system and method of operating the same' [patent_app_type] => new [patent_app_number] => 10/007410 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16831 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20020069317.pdf [firstpage_image] =>[orig_patent_app_number] => 10007410 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007410
E-RAID system and method of operating the same Nov 29, 2001 Abandoned
Array ( [id] => 6655448 [patent_doc_number] => 20030105931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Architecture for transparent mirroring' [patent_app_type] => new [patent_app_number] => 09/997756 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105931.pdf [firstpage_image] =>[orig_patent_app_number] => 09997756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997756
Architecture for transparent mirroring Nov 29, 2001 Abandoned
Array ( [id] => 1185870 [patent_doc_number] => 06745310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Real time local and remote management of data files and directories and method of operating the same' [patent_app_type] => B2 [patent_app_number] => 10/007413 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12460 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745310.pdf [firstpage_image] =>[orig_patent_app_number] => 10007413 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007413
Real time local and remote management of data files and directories and method of operating the same Nov 29, 2001 Issued
Array ( [id] => 5830475 [patent_doc_number] => 20020069337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Memory matrix and method of operating the same' [patent_app_type] => new [patent_app_number] => 10/007418 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12579 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20020069337.pdf [firstpage_image] =>[orig_patent_app_number] => 10007418 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007418
Memory matrix and method of operating the same Nov 29, 2001 Issued
Array ( [id] => 1217604 [patent_doc_number] => 06711494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Data formatter for shifting data to correct data lanes' [patent_app_type] => B2 [patent_app_number] => 10/000848 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3399 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/711/06711494.pdf [firstpage_image] =>[orig_patent_app_number] => 10000848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/000848
Data formatter for shifting data to correct data lanes Nov 29, 2001 Issued
Array ( [id] => 937544 [patent_doc_number] => 06976139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Reversing a communication path between storage devices' [patent_app_type] => utility [patent_app_number] => 09/998683 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7304 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/976/06976139.pdf [firstpage_image] =>[orig_patent_app_number] => 09998683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998683
Reversing a communication path between storage devices Nov 29, 2001 Issued
Array ( [id] => 6819081 [patent_doc_number] => 20030070039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Circuit and method for performing variable width searches in a content addressable memory' [patent_app_type] => new [patent_app_number] => 09/997296 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5292 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20030070039.pdf [firstpage_image] =>[orig_patent_app_number] => 09997296 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997296
Circuit and method for performing variable width searches in a content addressable memory Nov 29, 2001 Issued
Array ( [id] => 6655396 [patent_doc_number] => 20030105915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Address correcting method and device for a simultaneous dynamic random access memory module' [patent_app_type] => new [patent_app_number] => 09/996723 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1556 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105915.pdf [firstpage_image] =>[orig_patent_app_number] => 09996723 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/996723
Address correcting method and device for a simultaneous dynamic random access memory module Nov 29, 2001 Abandoned
Array ( [id] => 6655451 [patent_doc_number] => 20030105932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Emulation of memory clock enable pin and use of chip select for memory power control' [patent_app_type] => new [patent_app_number] => 10/010030 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5720 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105932.pdf [firstpage_image] =>[orig_patent_app_number] => 10010030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010030
Emulation of memory clock enable pin and use of chip select for memory power control Nov 29, 2001 Abandoned
Array ( [id] => 6424776 [patent_doc_number] => 20020184444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Request based caching of data store data' [patent_app_type] => new [patent_app_number] => 09/998896 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 43259 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184444.pdf [firstpage_image] =>[orig_patent_app_number] => 09998896 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998896
Request based caching of data store data Nov 29, 2001 Issued
Array ( [id] => 6655462 [patent_doc_number] => 20030105936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Storage area network methods and apparatus for logical-to-physical block address mapping' [patent_app_type] => new [patent_app_number] => 09/998920 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4023 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105936.pdf [firstpage_image] =>[orig_patent_app_number] => 09998920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998920
Storage area network methods and apparatus for logical-to-physical block address mapping Nov 29, 2001 Issued
Array ( [id] => 1258394 [patent_doc_number] => 06671784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'System and method for arbitrating access to a memory' [patent_app_type] => B2 [patent_app_number] => 09/996934 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3797 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671784.pdf [firstpage_image] =>[orig_patent_app_number] => 09996934 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/996934
System and method for arbitrating access to a memory Nov 29, 2001 Issued
Array ( [id] => 6655467 [patent_doc_number] => 20030105938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and apparatus for identifying candidate virtual addresses in a content-aware prefetcher' [patent_app_type] => new [patent_app_number] => 10/000549 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6861 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105938.pdf [firstpage_image] =>[orig_patent_app_number] => 10000549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/000549
Method and apparatus for identifying candidate virtual addresses in a content-aware prefetcher Nov 29, 2001 Issued
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