Search

Christian D. Wilson

Examiner (ID: 1080)

Most Active Art Unit
2824
Art Unit(s)
2829, 2891, 2824
Total Applications
392
Issued Applications
358
Pending Applications
5
Abandoned Applications
29

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 760900 [patent_doc_number] => 07012015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'Wafer-level thick film standing-wave clocking' [patent_app_type] => utility [patent_app_number] => 11/176164 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1929 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/012/07012015.pdf [firstpage_image] =>[orig_patent_app_number] => 11176164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176164
Wafer-level thick film standing-wave clocking Jul 5, 2005 Issued
Array ( [id] => 732624 [patent_doc_number] => 07037787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Flash memory with trench select gate and fabrication process' [patent_app_type] => utility [patent_app_number] => 11/059475 [patent_app_country] => US [patent_app_date] => 2005-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 6341 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037787.pdf [firstpage_image] =>[orig_patent_app_number] => 11059475 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059475
Flash memory with trench select gate and fabrication process Feb 15, 2005 Issued
Array ( [id] => 7178878 [patent_doc_number] => 20050124153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Advanced seed layery for metallic interconnects' [patent_app_type] => utility [patent_app_number] => 11/023833 [patent_app_country] => US [patent_app_date] => 2004-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9967 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20050124153.pdf [firstpage_image] =>[orig_patent_app_number] => 11023833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/023833
Advanced seed layery for metallic interconnects Dec 27, 2004 Issued
Array ( [id] => 953849 [patent_doc_number] => 06958263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Methods of forming devices, constructions and systems comprising thyristors' [patent_app_type] => utility [patent_app_number] => 10/954079 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 11867 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958263.pdf [firstpage_image] =>[orig_patent_app_number] => 10954079 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/954079
Methods of forming devices, constructions and systems comprising thyristors Sep 27, 2004 Issued
Array ( [id] => 7147720 [patent_doc_number] => 20050023586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Electronic systems comprising memory devices' [patent_app_type] => utility [patent_app_number] => 10/928491 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9416 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023586.pdf [firstpage_image] =>[orig_patent_app_number] => 10928491 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/928491
Electronic systems comprising memory devices Aug 26, 2004 Issued
Array ( [id] => 773444 [patent_doc_number] => 07001816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Embedded ROM device using substrate leakage' [patent_app_type] => utility [patent_app_number] => 10/924416 [patent_app_country] => US [patent_app_date] => 2004-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5576 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001816.pdf [firstpage_image] =>[orig_patent_app_number] => 10924416 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924416
Embedded ROM device using substrate leakage Aug 23, 2004 Issued
Array ( [id] => 760868 [patent_doc_number] => 07012006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'Embedded ROM device using substrate leakage' [patent_app_type] => utility [patent_app_number] => 10/924296 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5586 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/012/07012006.pdf [firstpage_image] =>[orig_patent_app_number] => 10924296 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924296
Embedded ROM device using substrate leakage Aug 22, 2004 Issued
Array ( [id] => 7023397 [patent_doc_number] => 20050017791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Metal-poly integrated capacitor structure' [patent_app_type] => utility [patent_app_number] => 10/921396 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4542 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017791.pdf [firstpage_image] =>[orig_patent_app_number] => 10921396 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/921396
Metal-poly integrated capacitor structure Aug 18, 2004 Issued
Array ( [id] => 7025305 [patent_doc_number] => 20050019699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Non-volatile resistance variable device' [patent_app_type] => utility [patent_app_number] => 10/920333 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3207 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20050019699.pdf [firstpage_image] =>[orig_patent_app_number] => 10920333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920333
Resistance variable device Aug 17, 2004 Issued
Array ( [id] => 956200 [patent_doc_number] => 06955950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Method for generating a protective cover for a device' [patent_app_type] => utility [patent_app_number] => 10/888568 [patent_app_country] => US [patent_app_date] => 2004-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/955/06955950.pdf [firstpage_image] =>[orig_patent_app_number] => 10888568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/888568
Method for generating a protective cover for a device Jul 8, 2004 Issued
Array ( [id] => 686602 [patent_doc_number] => 07078297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Memory with recessed devices' [patent_app_type] => utility [patent_app_number] => 10/857545 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 4461 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078297.pdf [firstpage_image] =>[orig_patent_app_number] => 10857545 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/857545
Memory with recessed devices May 27, 2004 Issued
Array ( [id] => 732384 [patent_doc_number] => 07037731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Ferroelectric capacitor, method of manufacturing the same, ferroelectric memory, and piezoelectric device' [patent_app_type] => utility [patent_app_number] => 10/807278 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4978 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037731.pdf [firstpage_image] =>[orig_patent_app_number] => 10807278 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807278
Ferroelectric capacitor, method of manufacturing the same, ferroelectric memory, and piezoelectric device Mar 23, 2004 Issued
Array ( [id] => 7349371 [patent_doc_number] => 20040248429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Transistor manufacturing method, electrooptical apparatus and electronic apparatus' [patent_app_type] => new [patent_app_number] => 10/804013 [patent_app_country] => US [patent_app_date] => 2004-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11923 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20040248429.pdf [firstpage_image] =>[orig_patent_app_number] => 10804013 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/804013
Transistor manufacturing method, electrooptical apparatus and electronic apparatus Mar 18, 2004 Issued
Array ( [id] => 7264092 [patent_doc_number] => 20040241961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Method for processing soi substrate' [patent_app_type] => new [patent_app_number] => 10/489738 [patent_app_country] => US [patent_app_date] => 2004-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4257 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20040241961.pdf [firstpage_image] =>[orig_patent_app_number] => 10489738 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/489738
Method for processing soi substrate Mar 15, 2004 Abandoned
Array ( [id] => 7393614 [patent_doc_number] => 20040173861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Transistor with nitrogen-hardened gate oxide' [patent_app_type] => new [patent_app_number] => 10/791400 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4382 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20040173861.pdf [firstpage_image] =>[orig_patent_app_number] => 10791400 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791400
Transistor with nitrogen-hardened gate oxide Mar 1, 2004 Issued
Array ( [id] => 7619730 [patent_doc_number] => 06943456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Plastic molded type semiconductor device and fabrication process thereof' [patent_app_type] => utility [patent_app_number] => 10/777084 [patent_app_country] => US [patent_app_date] => 2004-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7907 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/943/06943456.pdf [firstpage_image] =>[orig_patent_app_number] => 10777084 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/777084
Plastic molded type semiconductor device and fabrication process thereof Feb 12, 2004 Issued
Array ( [id] => 782746 [patent_doc_number] => 06991994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Method of forming rounded corner in trench' [patent_app_type] => utility [patent_app_number] => 10/771688 [patent_app_country] => US [patent_app_date] => 2004-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/991/06991994.pdf [firstpage_image] =>[orig_patent_app_number] => 10771688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/771688
Method of forming rounded corner in trench Feb 2, 2004 Issued
Array ( [id] => 1015024 [patent_doc_number] => 06894368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer, and integrated circuitry' [patent_app_type] => utility [patent_app_number] => 10/766376 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3882 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894368.pdf [firstpage_image] =>[orig_patent_app_number] => 10766376 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766376
Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer, and integrated circuitry Jan 26, 2004 Issued
Array ( [id] => 7362786 [patent_doc_number] => 20040217346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Method of deposting a dielectric film' [patent_app_type] => new [patent_app_number] => 10/484888 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1371 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217346.pdf [firstpage_image] =>[orig_patent_app_number] => 10484888 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/484888
Method of deposting a dielectric film Jan 26, 2004 Abandoned
Array ( [id] => 7116788 [patent_doc_number] => 20050070089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/760458 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2995 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20050070089.pdf [firstpage_image] =>[orig_patent_app_number] => 10760458 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/760458
Method of manufacturing a shallow trench isolation structure Jan 20, 2004 Issued
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