Search

Christian D. Wilson

Examiner (ID: 1080)

Most Active Art Unit
2824
Art Unit(s)
2829, 2891, 2824
Total Applications
392
Issued Applications
358
Pending Applications
5
Abandoned Applications
29

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7184212 [patent_doc_number] => 20040203217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Bottom oxide formation process for preventing formation of voids in trench' [patent_app_type] => new [patent_app_number] => 10/677568 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2600 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20040203217.pdf [firstpage_image] =>[orig_patent_app_number] => 10677568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/677568
Bottom oxide formation process for preventing formation of voids in trench Sep 30, 2003 Issued
Array ( [id] => 1005295 [patent_doc_number] => 06905888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-14 [patent_title] => 'Magnetic memory element having controlled nucleation site in data layer' [patent_app_type] => utility [patent_app_number] => 10/676414 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2163 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/905/06905888.pdf [firstpage_image] =>[orig_patent_app_number] => 10676414 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676414
Magnetic memory element having controlled nucleation site in data layer Sep 29, 2003 Issued
Array ( [id] => 7116786 [patent_doc_number] => 20050070087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Wafer-level thick film standing-wave clocking' [patent_app_type] => utility [patent_app_number] => 10/676958 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1877 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20050070087.pdf [firstpage_image] =>[orig_patent_app_number] => 10676958 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676958
Wafer-level thick film standing-wave clocking Sep 29, 2003 Issued
Array ( [id] => 982242 [patent_doc_number] => 06927086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method and apparatus for laser diode assembly and array' [patent_app_type] => utility [patent_app_number] => 10/671118 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3084 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927086.pdf [firstpage_image] =>[orig_patent_app_number] => 10671118 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671118
Method and apparatus for laser diode assembly and array Sep 23, 2003 Issued
Array ( [id] => 1083335 [patent_doc_number] => 06833559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Non-volatile resistance variable device' [patent_app_type] => B2 [patent_app_number] => 10/660602 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833559.pdf [firstpage_image] =>[orig_patent_app_number] => 10660602 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/660602
Non-volatile resistance variable device Sep 11, 2003 Issued
Array ( [id] => 1145014 [patent_doc_number] => 06777817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Reworkable and thermally conductive adhesive and use thereof' [patent_app_type] => B2 [patent_app_number] => 10/654978 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3408 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/777/06777817.pdf [firstpage_image] =>[orig_patent_app_number] => 10654978 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654978
Reworkable and thermally conductive adhesive and use thereof Sep 4, 2003 Issued
Array ( [id] => 7304893 [patent_doc_number] => 20040140523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Programmable resistance memory element with indirect heating' [patent_app_type] => new [patent_app_number] => 10/655975 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4470 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140523.pdf [firstpage_image] =>[orig_patent_app_number] => 10655975 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/655975
Programmable resistance memory element with indirect heating Sep 4, 2003 Issued
Array ( [id] => 7083353 [patent_doc_number] => 20050048733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Ultra-high density storage device using phase change diode memory cells and methods of fabrication thereof' [patent_app_type] => utility [patent_app_number] => 10/654189 [patent_app_country] => US [patent_app_date] => 2003-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3246 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20050048733.pdf [firstpage_image] =>[orig_patent_app_number] => 10654189 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654189
Ultra-high density storage device using phase change diode memory cells and methods of fabrication thereof Sep 2, 2003 Issued
Array ( [id] => 715547 [patent_doc_number] => 07052978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Arrangements incorporating laser-induced cleaving' [patent_app_type] => utility [patent_app_number] => 10/649958 [patent_app_country] => US [patent_app_date] => 2003-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 8053 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/052/07052978.pdf [firstpage_image] =>[orig_patent_app_number] => 10649958 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/649958
Arrangements incorporating laser-induced cleaving Aug 27, 2003 Issued
Array ( [id] => 788127 [patent_doc_number] => 06987059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-17 [patent_title] => 'Method and structure for creating ultra low resistance damascene copper wiring' [patent_app_type] => utility [patent_app_number] => 10/641768 [patent_app_country] => US [patent_app_date] => 2003-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4941 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/987/06987059.pdf [firstpage_image] =>[orig_patent_app_number] => 10641768 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/641768
Method and structure for creating ultra low resistance damascene copper wiring Aug 13, 2003 Issued
Array ( [id] => 7675141 [patent_doc_number] => 20040126977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Process for producing an integrated electronic component and electrical device incorporating an integrated component thus obtained' [patent_app_type] => new [patent_app_number] => 10/638228 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8641 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20040126977.pdf [firstpage_image] =>[orig_patent_app_number] => 10638228 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/638228
Process for producing an integrated electronic component Aug 6, 2003 Issued
Array ( [id] => 1040528 [patent_doc_number] => 06869826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice' [patent_app_type] => utility [patent_app_number] => 10/634074 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3356 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/869/06869826.pdf [firstpage_image] =>[orig_patent_app_number] => 10634074 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/634074
Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice Aug 3, 2003 Issued
Array ( [id] => 7025106 [patent_doc_number] => 20050019500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Attachment of organic molecules to group III, IV or V substrates' [patent_app_type] => utility [patent_app_number] => 10/628868 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11405 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20050019500.pdf [firstpage_image] =>[orig_patent_app_number] => 10628868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628868
Attachment of organic molecules to group III, IV or V substrates Jul 27, 2003 Issued
Array ( [id] => 1068713 [patent_doc_number] => 06844239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Method for forming shallow well of semiconductor device using low-energy ion implantation' [patent_app_type] => utility [patent_app_number] => 10/626248 [patent_app_country] => US [patent_app_date] => 2003-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/844/06844239.pdf [firstpage_image] =>[orig_patent_app_number] => 10626248 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/626248
Method for forming shallow well of semiconductor device using low-energy ion implantation Jul 22, 2003 Issued
Array ( [id] => 1002344 [patent_doc_number] => 06908798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-21 [patent_title] => 'Methods of making semiconductor-on-insulator thin film transistor constructions' [patent_app_type] => utility [patent_app_number] => 10/625068 [patent_app_country] => US [patent_app_date] => 2003-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6281 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/908/06908798.pdf [firstpage_image] =>[orig_patent_app_number] => 10625068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/625068
Methods of making semiconductor-on-insulator thin film transistor constructions Jul 21, 2003 Issued
Array ( [id] => 996498 [patent_doc_number] => 06913937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Memory cell array having ferroelectric capacity, method of manufacturing the same and ferroelectric memory device' [patent_app_type] => utility [patent_app_number] => 10/618688 [patent_app_country] => US [patent_app_date] => 2003-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 9056 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/913/06913937.pdf [firstpage_image] =>[orig_patent_app_number] => 10618688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/618688
Memory cell array having ferroelectric capacity, method of manufacturing the same and ferroelectric memory device Jul 14, 2003 Issued
Array ( [id] => 7360097 [patent_doc_number] => 20040014331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Semiconductor device with capacitor and process for manufacturing the device' [patent_app_type] => new [patent_app_number] => 10/619394 [patent_app_country] => US [patent_app_date] => 2003-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20040014331.pdf [firstpage_image] =>[orig_patent_app_number] => 10619394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/619394
MIM capacitor with diffusion barrier Jul 14, 2003 Issued
Array ( [id] => 1069185 [patent_doc_number] => 06844594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Minimally spaced gates and word lines' [patent_app_type] => utility [patent_app_number] => 10/616206 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 5296 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/844/06844594.pdf [firstpage_image] =>[orig_patent_app_number] => 10616206 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/616206
Minimally spaced gates and word lines Jul 9, 2003 Issued
Array ( [id] => 7089129 [patent_doc_number] => 20050009242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Packaging method for thin integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/615138 [patent_app_country] => US [patent_app_date] => 2003-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1700 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009242.pdf [firstpage_image] =>[orig_patent_app_number] => 10615138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/615138
Packaging method for thin integrated circuits Jul 8, 2003 Abandoned
Array ( [id] => 990711 [patent_doc_number] => 06919237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Process for fabricating thin film transistors' [patent_app_type] => utility [patent_app_number] => 10/610813 [patent_app_country] => US [patent_app_date] => 2003-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 34 [patent_no_of_words] => 17085 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919237.pdf [firstpage_image] =>[orig_patent_app_number] => 10610813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/610813
Process for fabricating thin film transistors Jul 1, 2003 Issued
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