Search

Christina A. Sylvia

Examiner (ID: 14390, Phone: (571)272-7474 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
885
Issued Applications
727
Pending Applications
84
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20675503 [patent_doc_number] => 12616038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-28 [patent_title] => Interconnect substrate and method of making [patent_app_type] => utility [patent_app_number] => 19/232724 [patent_app_country] => US [patent_app_date] => 2025-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 30 [patent_no_of_words] => 12458 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19232724 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/232724
Interconnect substrate and method of making Jun 8, 2025 Issued
Array ( [id] => 20423101 [patent_doc_number] => 20250385186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => MOLDED BRIDGE WITH VERTICAL INTERCONNECTS AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 19/218116 [patent_app_country] => US [patent_app_date] => 2025-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19218116 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/218116
Molded bridge with vertical interconnects and method of making the same May 22, 2025 Issued
Array ( [id] => 19515781 [patent_doc_number] => 20240347467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/749516 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749516
PACKAGE STRUCTURE Jun 19, 2024 Pending
Array ( [id] => 19500409 [patent_doc_number] => 20240339427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => MANUFACTURING METHOD OF PACKAGE STRUCTURE AND PACKAGE STRUCTURE THEREOF [patent_app_type] => utility [patent_app_number] => 18/743013 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743013
MANUFACTURING METHOD OF PACKAGE STRUCTURE AND PACKAGE STRUCTURE THEREOF Jun 12, 2024 Pending
Array ( [id] => 19452729 [patent_doc_number] => 20240312859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => PACKAGE SYSTEM AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/674903 [patent_app_country] => US [patent_app_date] => 2024-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674903
Package system and manufacturing method thereof May 25, 2024 Issued
Array ( [id] => 20113394 [patent_doc_number] => 12364151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Display device, method of manufacturing display device, electronic apparatus, and lighting device [patent_app_type] => utility [patent_app_number] => 18/657031 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 7134 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657031 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657031
Display device, method of manufacturing display device, electronic apparatus, and lighting device May 6, 2024 Issued
Array ( [id] => 20375329 [patent_doc_number] => 12482773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Integrated circuit structure, and method for forming thereof [patent_app_type] => utility [patent_app_number] => 18/641442 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 3203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641442
Integrated circuit structure, and method for forming thereof Apr 21, 2024 Issued
Array ( [id] => 20118366 [patent_doc_number] => 12368084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/641449 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 2231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641449 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641449
Package structure and manufacturing method thereof Apr 21, 2024 Issued
Array ( [id] => 20516677 [patent_doc_number] => 20260040780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/619176 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619176 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619176
ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS Mar 27, 2024 Pending
Array ( [id] => 19484386 [patent_doc_number] => 20240332428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/617858 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18617858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/617858
SEMICONDUCTOR DEVICE AND DISPLAY DEVICE Mar 26, 2024 Pending
Array ( [id] => 19364263 [patent_doc_number] => 20240266297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Package-On-Package Device [patent_app_type] => utility [patent_app_number] => 18/602718 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602718 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602718
Package-on-package device Mar 11, 2024 Issued
Array ( [id] => 20469544 [patent_doc_number] => 12525587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Semiconductor device and method of forming vertical interconnect structure for pop module [patent_app_type] => utility [patent_app_number] => 18/599304 [patent_app_country] => US [patent_app_date] => 2024-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 29 [patent_no_of_words] => 0 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18599304 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/599304
Semiconductor device and method of forming vertical interconnect structure for pop module Mar 7, 2024 Issued
Array ( [id] => 20210828 [patent_doc_number] => 20250280548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => CAPACITOR STRUCTURE AND METHOD FOR FABRICATING THE CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/590956 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590956 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590956
CAPACITOR STRUCTURE AND METHOD FOR FABRICATING THE CAPACITOR Feb 28, 2024 Pending
Array ( [id] => 20002511 [patent_doc_number] => 20250140733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => DIE BONDING STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/584050 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584050 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584050
DIE BONDING STRUCTURE AND METHOD OF MANUFACTURING THE SAME Feb 21, 2024 Pending
Array ( [id] => 19407310 [patent_doc_number] => 20240290821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => METHOD OF MANUFACTURING ELECTRODE, CAPACITOR AND INTEGRATED DEVICE INCLUDING THE ELECTRODE MANUFACTURED THEREBY [patent_app_type] => utility [patent_app_number] => 18/444162 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444162
METHOD OF MANUFACTURING ELECTRODE, CAPACITOR AND INTEGRATED DEVICE INCLUDING THE ELECTRODE MANUFACTURED THEREBY Feb 15, 2024 Pending
Array ( [id] => 19906566 [patent_doc_number] => 12283585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Optoelectronic device package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/434703 [patent_app_country] => US [patent_app_date] => 2024-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/434703
Optoelectronic device package and method of manufacturing the same Feb 5, 2024 Issued
Array ( [id] => 19252891 [patent_doc_number] => 20240203888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/430066 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430066 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/430066
Semiconductor package and method of fabricating the same Jan 31, 2024 Issued
Array ( [id] => 19206278 [patent_doc_number] => 20240178177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => Arrangement of Power-Grounds in Package Structures [patent_app_type] => utility [patent_app_number] => 18/428934 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428934 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428934
Arrangement of power-grounds in package structures Jan 30, 2024 Issued
Array ( [id] => 19727162 [patent_doc_number] => 20250029913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/419084 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419084 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419084
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME Jan 21, 2024 Pending
Array ( [id] => 19163137 [patent_doc_number] => 20240155844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE WITH MOLD STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/415460 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415460 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415460
Three-dimensional semiconductor memory device Jan 16, 2024 Issued
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