Search

Christina A. Sylvia

Examiner (ID: 14390, Phone: (571)272-7474 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
885
Issued Applications
727
Pending Applications
84
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20932973 [patent_doc_number] => 12727177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-01 [patent_title] => Package with integrated voltage regulator and method forming the same [patent_app_type] => utility [patent_app_number] => 18/158078 [patent_app_country] => US [patent_app_date] => 2023-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 6746 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158078 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/158078
PACKAGE WITH INTEGRATED VOLTAGE REGULATOR AND METHOD FORMING THE SAME Jan 22, 2023 Pending
Array ( [id] => 20692114 [patent_doc_number] => 12622290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Chip structure and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 18/152153 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 4286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152153
Chip structure and method of fabricating the same Jan 9, 2023 Issued
Array ( [id] => 20926081 [patent_doc_number] => 12721171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => Integrated curcuit to dielectric substrate transition [patent_app_type] => utility [patent_app_number] => 18/148176 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 6688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148176 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148176
INTEGRATED CURCUIT TO DIELECTRIC SUBSTRATE TRANSITION Dec 28, 2022 Pending
Array ( [id] => 19285870 [patent_doc_number] => 20240222347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MODULAR MEMORY BLOCKS FOR INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 18/148338 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148338
MODULAR MEMORY BLOCKS FOR INTEGRATED CIRCUIT DEVICES Dec 28, 2022 Pending
Array ( [id] => 19060449 [patent_doc_number] => 11939659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Deposition mask group, manufacturing method of electronic device, and electronic device [patent_app_type] => utility [patent_app_number] => 18/146490 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 76 [patent_no_of_words] => 35225 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146490
Deposition mask group, manufacturing method of electronic device, and electronic device Dec 26, 2022 Issued
Array ( [id] => 19199082 [patent_doc_number] => 11996331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Method for separating a solid body [patent_app_type] => utility [patent_app_number] => 18/078135 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 48 [patent_no_of_words] => 9619 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078135 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078135
Method for separating a solid body Dec 8, 2022 Issued
Array ( [id] => 18293943 [patent_doc_number] => 20230103629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => METHOD OF FABRICATING PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/078111 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078111
Method of fabricating package structure Dec 8, 2022 Issued
Array ( [id] => 19046729 [patent_doc_number] => 11935849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Semiconductor package with an antenna substrate [patent_app_type] => utility [patent_app_number] => 18/061763 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 7624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061763
Semiconductor package with an antenna substrate Dec 4, 2022 Issued
Array ( [id] => 18264688 [patent_doc_number] => 20230085930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => Semiconductor Package with Multiple Redistribution Substrates [patent_app_type] => utility [patent_app_number] => 18/060853 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060853 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/060853
Semiconductor package with multiple redistribution substrates Nov 30, 2022 Issued
Array ( [id] => 18394893 [patent_doc_number] => 20230163114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => THREE-DIMENSIONAL FAN-OUT INTEGRATED PACKAGE STRUCTURE, PACKAGING METHOD THEREOF, AND WIRELESS HEADSET [patent_app_type] => utility [patent_app_number] => 17/989224 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989224 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989224
Three-dimensional fan-out integrated package structure, packaging method thereof, and wireless headset Nov 16, 2022 Issued
Array ( [id] => 18242716 [patent_doc_number] => 20230075027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/055805 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055805 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055805
SEMICONDUCTOR PACKAGE Nov 14, 2022 Pending
Array ( [id] => 19116450 [patent_doc_number] => 20240128200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => Semiconductor Device and Method of Forming Graphene Core Shell Embedded Within Shielding Layer [patent_app_type] => utility [patent_app_number] => 18/046028 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046028
Semiconductor device and method of forming graphene core shell embedded within shielding layer Oct 11, 2022 Issued
Array ( [id] => 20360158 [patent_doc_number] => 12476163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Semiconductor device and semiconductor module [patent_app_type] => utility [patent_app_number] => 17/964381 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 58 [patent_no_of_words] => 13276 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964381 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964381
Semiconductor device and semiconductor module Oct 11, 2022 Issued
Array ( [id] => 20080897 [patent_doc_number] => 12354974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Semiconductor package including photo imageable dielectric [patent_app_type] => utility [patent_app_number] => 17/956153 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 1091 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956153
Semiconductor package including photo imageable dielectric Sep 28, 2022 Issued
Array ( [id] => 20638105 [patent_doc_number] => 12599004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Semiconductor device with active mold package and method therefor [patent_app_type] => utility [patent_app_number] => 17/936132 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 1192 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936132
Semiconductor device with active mold package and method therefor Sep 27, 2022 Issued
Array ( [id] => 20807662 [patent_doc_number] => 12672585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Package comprising an integrated device, a chiplet and a metallization portion [patent_app_type] => utility [patent_app_number] => 17/952163 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 12847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952163
Package comprising an integrated device, a chiplet and a metallization portion Sep 22, 2022 Issued
Array ( [id] => 18898703 [patent_doc_number] => 20240014188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR PACKAGE ASSEMBLY AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/951722 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951722
Semiconductor package assembly and manufacturing method Sep 22, 2022 Issued
Array ( [id] => 18555314 [patent_doc_number] => 20230253331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/897523 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897523 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897523
Electronic package and manufacturing method thereof Aug 28, 2022 Issued
Array ( [id] => 18335546 [patent_doc_number] => 20230127494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => SIGNAL-HEAT SEPARATED TMV PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/821725 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821725
Signal-heat separated TMV packaging structure and manufacturing method thereof Aug 22, 2022 Issued
Array ( [id] => 19007922 [patent_doc_number] => 20240071993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN TWO METALLIZATION PORTIONS [patent_app_type] => utility [patent_app_number] => 17/894057 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/894057
PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN TWO METALLIZATION PORTIONS Aug 22, 2022 Pending
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