Christina Ann Johnson
Supervisory Patent Examiner (ID: 1313, Phone: (571)272-1176 , Office: P/1742 )
Most Active Art Unit | 1725 |
Art Unit(s) | 1732, 1725, 1742, 1754, 1791 |
Total Applications | 736 |
Issued Applications | 453 |
Pending Applications | 43 |
Abandoned Applications | 240 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7000658
[patent_doc_number] => 20010053607
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-20
[patent_title] => 'Fabrication process of semiconductor substrate'
[patent_app_type] => new
[patent_app_number] => 09/933711
[patent_app_country] => US
[patent_app_date] => 2001-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 22810
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0053/20010053607.pdf
[firstpage_image] =>[orig_patent_app_number] => 09933711
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/933711 | Fabrication process of semiconductor substrate | Aug 21, 2001 | Abandoned |
Array
(
[id] => 1362550
[patent_doc_number] => RE038072
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2003-04-08
[patent_title] => 'Fabrication method for AlGaInNPAsSb based devices'
[patent_app_type] => E1
[patent_app_number] => 09/924504
[patent_app_country] => US
[patent_app_date] => 2001-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 7447
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/038/RE038072.pdf
[firstpage_image] =>[orig_patent_app_number] => 09924504
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/924504 | Fabrication method for AlGaInNPAsSb based devices | Aug 8, 2001 | Issued |
Array
(
[id] => 1417528
[patent_doc_number] => 06514774
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-02-04
[patent_title] => 'Method of fabrication of step edge'
[patent_app_type] => B1
[patent_app_number] => 09/787166
[patent_app_country] => US
[patent_app_date] => 2001-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 2750
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/514/06514774.pdf
[firstpage_image] =>[orig_patent_app_number] => 09787166
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/787166 | Method of fabrication of step edge | Jun 19, 2001 | Issued |
Array
(
[id] => 6896210
[patent_doc_number] => 20010027000
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-04
[patent_title] => 'Semiconductor processing methods of forming integrated circuitry and semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry'
[patent_app_type] => new
[patent_app_number] => 09/879741
[patent_app_country] => US
[patent_app_date] => 2001-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1624
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20010027000.pdf
[firstpage_image] =>[orig_patent_app_number] => 09879741
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/879741 | Semiconductor processing methods of forming integrated circuitry and semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry | Jun 10, 2001 | Issued |
Array
(
[id] => 5814866
[patent_doc_number] => 20020039806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-04
[patent_title] => 'Method for growing p-n homojunction-based structures utilizing HVPE techniques'
[patent_app_type] => new
[patent_app_number] => 09/860619
[patent_app_country] => US
[patent_app_date] => 2001-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7906
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 438
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0039/20020039806.pdf
[firstpage_image] =>[orig_patent_app_number] => 09860619
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/860619 | Method for growing p-n homojunction-based structures utilizing HVPE techniques | May 17, 2001 | Issued |
Array
(
[id] => 7014499
[patent_doc_number] => 20010051389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-13
[patent_title] => 'Method for manufacturing high efficiency photovoltaic devices at enhanced depositions rates'
[patent_app_type] => new
[patent_app_number] => 09/850836
[patent_app_country] => US
[patent_app_date] => 2001-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4511
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0051/20010051389.pdf
[firstpage_image] =>[orig_patent_app_number] => 09850836
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/850836 | Method for manufacturing high efficiency photovoltaic devices at enhanced depositions rates | May 7, 2001 | Issued |
Array
(
[id] => 6893103
[patent_doc_number] => 20010015469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-23
[patent_title] => 'Visible light emitting device formed from wide band gap semiconductor doped with a rare earth element'
[patent_app_type] => new
[patent_app_number] => 09/845446
[patent_app_country] => US
[patent_app_date] => 2001-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3074
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0015/20010015469.pdf
[firstpage_image] =>[orig_patent_app_number] => 09845446
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/845446 | Fabrication of visible light emitting device formed from wide band gap semiconductor doped with a rare earth element | Apr 29, 2001 | Issued |
Array
(
[id] => 1514407
[patent_doc_number] => 06420189
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-16
[patent_title] => 'Superconducting damascene interconnected for integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/844845
[patent_app_country] => US
[patent_app_date] => 2001-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 7752
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/420/06420189.pdf
[firstpage_image] =>[orig_patent_app_number] => 09844845
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/844845 | Superconducting damascene interconnected for integrated circuit | Apr 26, 2001 | Issued |
Array
(
[id] => 1467066
[patent_doc_number] => 06458699
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'Methods of forming a contact to a substrate'
[patent_app_type] => B1
[patent_app_number] => 09/843116
[patent_app_country] => US
[patent_app_date] => 2001-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 3638
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/458/06458699.pdf
[firstpage_image] =>[orig_patent_app_number] => 09843116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/843116 | Methods of forming a contact to a substrate | Apr 23, 2001 | Issued |
Array
(
[id] => 7643931
[patent_doc_number] => 06429107
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-08-06
[patent_title] => 'Method for forming conductive contact of semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 09/839855
[patent_app_country] => US
[patent_app_date] => 2001-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4463
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 16
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/429/06429107.pdf
[firstpage_image] =>[orig_patent_app_number] => 09839855
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/839855 | Method for forming conductive contact of semiconductor device | Apr 19, 2001 | Issued |
Array
(
[id] => 1469720
[patent_doc_number] => 06406932
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-06-18
[patent_title] => 'Fabrication of high power semiconductor lasers with ridge waveguide structure'
[patent_app_type] => B2
[patent_app_number] => 09/832955
[patent_app_country] => US
[patent_app_date] => 2001-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 2948
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/406/06406932.pdf
[firstpage_image] =>[orig_patent_app_number] => 09832955
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/832955 | Fabrication of high power semiconductor lasers with ridge waveguide structure | Apr 11, 2001 | Issued |
Array
(
[id] => 1576265
[patent_doc_number] => 06469334
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-10-22
[patent_title] => 'Ferroelectric field effect transistor'
[patent_app_type] => B2
[patent_app_number] => 09/821596
[patent_app_country] => US
[patent_app_date] => 2001-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 7503
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/469/06469334.pdf
[firstpage_image] =>[orig_patent_app_number] => 09821596
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/821596 | Ferroelectric field effect transistor | Mar 28, 2001 | Issued |
Array
(
[id] => 1520707
[patent_doc_number] => 06413840
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-02
[patent_title] => 'Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof'
[patent_app_type] => B1
[patent_app_number] => 09/821165
[patent_app_country] => US
[patent_app_date] => 2001-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 1156
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/413/06413840.pdf
[firstpage_image] =>[orig_patent_app_number] => 09821165
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/821165 | Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof | Mar 27, 2001 | Issued |
Array
(
[id] => 1590851
[patent_doc_number] => 06483165
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-19
[patent_title] => 'Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation'
[patent_app_type] => B2
[patent_app_number] => 09/816406
[patent_app_country] => US
[patent_app_date] => 2001-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 67
[patent_figures_cnt] => 71
[patent_no_of_words] => 26934
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/483/06483165.pdf
[firstpage_image] =>[orig_patent_app_number] => 09816406
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/816406 | Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation | Mar 25, 2001 | Issued |
Array
(
[id] => 1565511
[patent_doc_number] => 06376259
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-23
[patent_title] => 'Method for manufacturing a ferroelectric memory cell including co-annealing'
[patent_app_type] => B1
[patent_app_number] => 09/816425
[patent_app_country] => US
[patent_app_date] => 2001-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 1957
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/376/06376259.pdf
[firstpage_image] =>[orig_patent_app_number] => 09816425
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/816425 | Method for manufacturing a ferroelectric memory cell including co-annealing | Mar 20, 2001 | Issued |
Array
(
[id] => 1580324
[patent_doc_number] => 06448625
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'High voltage metal oxide device with enhanced well region'
[patent_app_type] => B1
[patent_app_number] => 09/808966
[patent_app_country] => US
[patent_app_date] => 2001-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 2093
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448625.pdf
[firstpage_image] =>[orig_patent_app_number] => 09808966
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/808966 | High voltage metal oxide device with enhanced well region | Mar 15, 2001 | Issued |
Array
(
[id] => 6893069
[patent_doc_number] => 20010015435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-23
[patent_title] => 'Method for producing solid-state image-sensing device'
[patent_app_type] => new
[patent_app_number] => 09/799995
[patent_app_country] => US
[patent_app_date] => 2001-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 10564
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0015/20010015435.pdf
[firstpage_image] =>[orig_patent_app_number] => 09799995
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/799995 | Method for producing solid-state image-sensing device | Mar 5, 2001 | Issued |
Array
(
[id] => 7014538
[patent_doc_number] => 20010051398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-13
[patent_title] => 'Electro-optical device'
[patent_app_type] => new
[patent_app_number] => 09/793116
[patent_app_country] => US
[patent_app_date] => 2001-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 18963
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 31
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0051/20010051398.pdf
[firstpage_image] =>[orig_patent_app_number] => 09793116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/793116 | Method of manufacturing an electro-optical device | Feb 26, 2001 | Issued |
Array
(
[id] => 6986847
[patent_doc_number] => 20010036679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Optical component having a chemically etched guide with a ridge structure and its method of manufacture'
[patent_app_type] => new
[patent_app_number] => 09/789826
[patent_app_country] => US
[patent_app_date] => 2001-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2363
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0036/20010036679.pdf
[firstpage_image] =>[orig_patent_app_number] => 09789826
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/789826 | Optical component having a chemically etched guide with a ridge structure and its method of manufacture | Feb 21, 2001 | Issued |
Array
(
[id] => 5922054
[patent_doc_number] => 20020115272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-22
[patent_title] => 'Manufacturing method for improving reliability of polysilicon thin film transistors'
[patent_app_type] => new
[patent_app_number] => 09/792215
[patent_app_country] => US
[patent_app_date] => 2001-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1715
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0115/20020115272.pdf
[firstpage_image] =>[orig_patent_app_number] => 09792215
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/792215 | Manufacturing method for improving reliability of polysilicon thin film transistors | Feb 19, 2001 | Issued |