
Christine A. Enad
Examiner (ID: 4019, Phone: (571)270-7891 , Office: P/2823 )
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2823, 2811, 4116 |
| Total Applications | 1524 |
| Issued Applications | 1218 |
| Pending Applications | 124 |
| Abandoned Applications | 210 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19038225
[patent_doc_number] => 20240088040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => MULTI-LAYER LINE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/512125
[patent_app_country] => US
[patent_app_date] => 2023-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15625
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512125
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/512125 | Multi-layer line structure | Nov 16, 2023 | Issued |
Array
(
[id] => 20013131
[patent_doc_number] => 20250151353
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/501960
[patent_app_country] => US
[patent_app_date] => 2023-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501960
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/501960 | SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF | Nov 2, 2023 | Pending |
Array
(
[id] => 18991092
[patent_doc_number] => 20240063061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => IN-SITU FORMATION OF METAL GATE MODULATORS
[patent_app_type] => utility
[patent_app_number] => 18/499650
[patent_app_country] => US
[patent_app_date] => 2023-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7553
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499650
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/499650 | In-situ formation of metal gate modulators | Oct 31, 2023 | Issued |
Array
(
[id] => 19057034
[patent_doc_number] => 20240099003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS
[patent_app_type] => utility
[patent_app_number] => 18/499091
[patent_app_country] => US
[patent_app_date] => 2023-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499091
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/499091 | Methods for forming multi-layer vertical NOR-type memory string arrays | Oct 30, 2023 | Issued |
Array
(
[id] => 19918649
[patent_doc_number] => 12294028
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-06
[patent_title] => Manufacturing method of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/494759
[patent_app_country] => US
[patent_app_date] => 2023-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 3256
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494759
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/494759 | Manufacturing method of semiconductor device | Oct 24, 2023 | Issued |
Array
(
[id] => 18975429
[patent_doc_number] => 20240055521
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-15
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/383153
[patent_app_country] => US
[patent_app_date] => 2023-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16560
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383153
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/383153 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Oct 23, 2023 | Pending |
Array
(
[id] => 19428399
[patent_doc_number] => 12087836
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-10
[patent_title] => Contact over active gate structures with metal oxide-caped contacts to inhibit shorting
[patent_app_type] => utility
[patent_app_number] => 18/382339
[patent_app_country] => US
[patent_app_date] => 2023-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 29
[patent_no_of_words] => 13833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382339
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/382339 | Contact over active gate structures with metal oxide-caped contacts to inhibit shorting | Oct 19, 2023 | Issued |
Array
(
[id] => 19285894
[patent_doc_number] => 20240222371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => SEMICONDUCTOR DEVICE WITH WORK FUNCTION LAYER
[patent_app_type] => utility
[patent_app_number] => 18/380321
[patent_app_country] => US
[patent_app_date] => 2023-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10136
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380321
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/380321 | SEMICONDUCTOR DEVICE WITH WORK FUNCTION LAYER | Oct 15, 2023 | Pending |
Array
(
[id] => 19116396
[patent_doc_number] => 20240128146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => SEMICONDUCTOR PACKAGE FOR ENHANCED COOLING
[patent_app_type] => utility
[patent_app_number] => 18/474250
[patent_app_country] => US
[patent_app_date] => 2023-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474250
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/474250 | SEMICONDUCTOR PACKAGE FOR ENHANCED COOLING | Sep 25, 2023 | Pending |
Array
(
[id] => 19868411
[patent_doc_number] => 20250107197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-27
[patent_title] => SPACER TO AVOID SOURCE AND DRAIN SHORTING
[patent_app_type] => utility
[patent_app_number] => 18/471645
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471645
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471645 | SPACER TO AVOID SOURCE AND DRAIN SHORTING | Sep 20, 2023 | Pending |
Array
(
[id] => 19728621
[patent_doc_number] => 20250031372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/471296
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7723
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471296
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471296 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | Sep 20, 2023 | Pending |
Array
(
[id] => 19866300
[patent_doc_number] => 20250105086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-27
[patent_title] => Integrated Circuit Packages and Methods of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 18/471739
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9124
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471739
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471739 | Integrated Circuit Packages and Methods of Forming the Same | Sep 20, 2023 | Pending |
Array
(
[id] => 19071302
[patent_doc_number] => 20240105728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL
[patent_app_type] => utility
[patent_app_number] => 18/472074
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22221
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472074
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/472074 | TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL | Sep 20, 2023 | Pending |
Array
(
[id] => 19850700
[patent_doc_number] => 20250096051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => PACKAGE COMPRISING A SUBSTRATE WITH CAVITY, AND AN INTEGRATED DEVICE LOCATED IN THE CAVITY OF THE SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/471069
[patent_app_country] => US
[patent_app_date] => 2023-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11164
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471069
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471069 | PACKAGE COMPRISING A SUBSTRATE WITH CAVITY, AND AN INTEGRATED DEVICE LOCATED IN THE CAVITY OF THE SUBSTRATE | Sep 19, 2023 | Pending |
Array
(
[id] => 19837499
[patent_doc_number] => 20250089285
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/367129
[patent_app_country] => US
[patent_app_date] => 2023-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6264
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367129
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/367129 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME | Sep 11, 2023 | Pending |
Array
(
[id] => 18865883
[patent_doc_number] => 20230420320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/465657
[patent_app_country] => US
[patent_app_date] => 2023-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6507
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465657
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/465657 | SEMICONDUCTOR DEVICE | Sep 11, 2023 | Pending |
Array
(
[id] => 18866079
[patent_doc_number] => 20230420516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/464839
[patent_app_country] => US
[patent_app_date] => 2023-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8795
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464839
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/464839 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | Sep 10, 2023 | Pending |
Array
(
[id] => 20869564
[patent_doc_number] => 12696479
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-07-28
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/463124
[patent_app_country] => US
[patent_app_date] => 2023-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3135
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 409
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463124
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/463124 | SEMICONDUCTOR DEVICE | Sep 6, 2023 | Issued |
Array
(
[id] => 19823391
[patent_doc_number] => 20250081598
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/460578
[patent_app_country] => US
[patent_app_date] => 2023-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7405
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460578
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/460578 | INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF | Sep 2, 2023 | Pending |
Array
(
[id] => 20827452
[patent_doc_number] => 12681012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-07-14
[patent_title] => Biosensor and a biosensing kit
[patent_app_type] => utility
[patent_app_number] => 18/241871
[patent_app_country] => US
[patent_app_date] => 2023-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 1906
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241871
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/241871 | Biosensor and a biosensing kit | Sep 2, 2023 | Issued |