
Christine T. Duong
Examiner (ID: 2346)
| Most Active Art Unit | 2462 |
| Art Unit(s) | 2416, 2462, 2616 |
| Total Applications | 777 |
| Issued Applications | 656 |
| Pending Applications | 10 |
| Abandoned Applications | 123 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6193131
[patent_doc_number] => 20110024885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-03
[patent_title] => 'METHOD FOR MAKING SEMICONDUCTOR CHIPS HAVING COATED PORTIONS'
[patent_app_type] => utility
[patent_app_number] => 12/849342
[patent_app_country] => US
[patent_app_date] => 2010-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2503
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20110024885.pdf
[firstpage_image] =>[orig_patent_app_number] => 12849342
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/849342 | METHOD FOR MAKING SEMICONDUCTOR CHIPS HAVING COATED PORTIONS | Aug 2, 2010 | Abandoned |
Array
(
[id] => 9469701
[patent_doc_number] => 08723335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-13
[patent_title] => 'Semiconductor circuit structure and method of forming the same using a capping layer'
[patent_app_type] => utility
[patent_app_number] => 12/847244
[patent_app_country] => US
[patent_app_date] => 2010-07-30
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847244
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/847244 | Semiconductor circuit structure and method of forming the same using a capping layer | Jul 29, 2010 | Issued |
Array
(
[id] => 7750613
[patent_doc_number] => 20120025388
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE HAVING IMPROVED POWER AND THERMAL MANAGEMENT'
[patent_app_type] => utility
[patent_app_number] => 12/846418
[patent_app_country] => US
[patent_app_date] => 2010-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0025/20120025388.pdf
[firstpage_image] =>[orig_patent_app_number] => 12846418
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/846418 | Three-dimensional integrated circuit structure having improved power and thermal management | Jul 28, 2010 | Issued |
Array
(
[id] => 10876958
[patent_doc_number] => 08901747
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-02
[patent_title] => 'Semiconductor chip layout'
[patent_app_type] => utility
[patent_app_number] => 12/846763
[patent_app_country] => US
[patent_app_date] => 2010-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12846763
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/846763 | Semiconductor chip layout | Jul 28, 2010 | Issued |
Array
(
[id] => 5940907
[patent_doc_number] => 20110101527
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'MECHANISMS FOR FORMING COPPER PILLAR BUMPS'
[patent_app_type] => utility
[patent_app_number] => 12/846353
[patent_app_country] => US
[patent_app_date] => 2010-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0101/20110101527.pdf
[firstpage_image] =>[orig_patent_app_number] => 12846353
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/846353 | Mechanisms for forming copper pillar bumps | Jul 28, 2010 | Issued |
Array
(
[id] => 6153336
[patent_doc_number] => 20110156083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-30
[patent_title] => 'Light emission module with high-efficiency light emission and high-efficiency heat dissipation and applications thereof'
[patent_app_type] => utility
[patent_app_number] => 12/845612
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[patent_app_date] => 2010-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0156/20110156083.pdf
[firstpage_image] =>[orig_patent_app_number] => 12845612
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/845612 | Light emission module with high-efficiency light emission and high-efficiency heat dissipation and applications thereof | Jul 27, 2010 | Abandoned |
Array
(
[id] => 7738811
[patent_doc_number] => 20120018798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'Method for Protecting a Semiconductor Device Against Degradation, a Semiconductor Device Protected Against Hot Charge Carriers and a Manufacturing Method Therefor'
[patent_app_type] => utility
[patent_app_number] => 12/843326
[patent_app_country] => US
[patent_app_date] => 2010-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
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[firstpage_image] =>[orig_patent_app_number] => 12843326
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843326 | Method for protecting a semiconductor device against degradation, a semiconductor device protected against hot charge carriers and a manufacturing method therefor | Jul 25, 2010 | Issued |
Array
(
[id] => 5980175
[patent_doc_number] => 20110095372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-28
[patent_title] => 'Forming Inter-Device STI Regions and Intra-Device STI Regions Using Different Dielectric Materials'
[patent_app_type] => utility
[patent_app_number] => 12/843658
[patent_app_country] => US
[patent_app_date] => 2010-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 2588
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[pdf_file] => publications/A1/0095/20110095372.pdf
[firstpage_image] =>[orig_patent_app_number] => 12843658
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843658 | Forming inter-device STI regions and intra-device STI regions using different dielectric materials | Jul 25, 2010 | Issued |
Array
(
[id] => 6067814
[patent_doc_number] => 20110042783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'ELECTRONIC DEVICE AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/843869
[patent_app_country] => US
[patent_app_date] => 2010-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0042/20110042783.pdf
[firstpage_image] =>[orig_patent_app_number] => 12843869
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843869 | Electronic device containing passive components and fabrication method thereof | Jul 25, 2010 | Issued |
Array
(
[id] => 9413431
[patent_doc_number] => 08697467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Surface and gas phase doping of III-V semiconductors'
[patent_app_type] => utility
[patent_app_number] => 12/843271
[patent_app_country] => US
[patent_app_date] => 2010-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843271 | Surface and gas phase doping of III-V semiconductors | Jul 25, 2010 | Issued |
Array
(
[id] => 8555666
[patent_doc_number] => 08330140
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[patent_kind] => B2
[patent_issue_date] => 2012-12-11
[patent_title] => 'Semiconductor light emitting device'
[patent_app_type] => utility
[patent_app_number] => 12/843196
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843196 | Semiconductor light emitting device | Jul 25, 2010 | Issued |
Array
(
[id] => 5972609
[patent_doc_number] => 20110068379
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[patent_issue_date] => 2011-03-24
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843684 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Jul 25, 2010 | Abandoned |
Array
(
[id] => 9590005
[patent_doc_number] => 08779548
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[patent_kind] => B2
[patent_issue_date] => 2014-07-15
[patent_title] => 'Integrated circuit including a porous material for retaining a liquid and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843809 | Integrated circuit including a porous material for retaining a liquid and manufacturing method thereof | Jul 25, 2010 | Issued |
Array
(
[id] => 7738741
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[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'ELECTRONIC DEVICE STRUCTURE WITH A SEMICONDUCTOR LEDGE LAYER FOR SURFACE PASSIVATION'
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[patent_app_number] => 12/843113
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[firstpage_image] =>[orig_patent_app_number] => 12843113
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843113 | Electronic device structure with a semiconductor ledge layer for surface passivation | Jul 25, 2010 | Issued |
Array
(
[id] => 7738831
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'SELF-ALIGNED SILICIDATION FOR REPLACEMENT GATE PROCESS'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843350 | Self-aligned silicidation for replacement gate process | Jul 25, 2010 | Issued |
Array
(
[id] => 8876361
[patent_doc_number] => 08471328
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[patent_issue_date] => 2013-06-25
[patent_title] => 'Non-volatile memory and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843093 | Non-volatile memory and manufacturing method thereof | Jul 25, 2010 | Issued |
Array
(
[id] => 8653488
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[patent_issue_date] => 2013-02-12
[patent_title] => 'FinFETs with multiple Fin heights'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843697 | SEMICONDUCTOR APPARATUS CAPABLE OF REDUCING PLASMA DAMAGE | Jul 25, 2010 | Abandoned |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/839426 | Laterally diffused metal-oxide-semiconductor device | Jul 19, 2010 | Issued |