Search

Christine Trinh Le Tu

Examiner (ID: 15624, Phone: (571)272-3831 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2313, 2117, 2133, 2785, 2138, 2111, 2413, 2784
Total Applications
1748
Issued Applications
1571
Pending Applications
27
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9974303 [patent_doc_number] => 09021340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Error recovery using erasures for NAND Flash' [patent_app_type] => utility [patent_app_number] => 14/524942 [patent_app_country] => US [patent_app_date] => 2014-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5308 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524942 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/524942
Error recovery using erasures for NAND Flash Oct 26, 2014 Issued
Array ( [id] => 10029363 [patent_doc_number] => 09071280 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-30 [patent_title] => 'Method and apparatus for controlling a number of decoding iterations of a decoder based on a temperature of an integrated circuit that includes the decoder' [patent_app_type] => utility [patent_app_number] => 14/518461 [patent_app_country] => US [patent_app_date] => 2014-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3627 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14518461 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/518461
Method and apparatus for controlling a number of decoding iterations of a decoder based on a temperature of an integrated circuit that includes the decoder Oct 19, 2014 Issued
Array ( [id] => 11036933 [patent_doc_number] => 20160233890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 15/022750 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 123 [patent_figures_cnt] => 123 [patent_no_of_words] => 36970 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15022750 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/022750
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD Sep 11, 2014 Abandoned
Array ( [id] => 11118663 [patent_doc_number] => 20160315636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 15/022381 [patent_app_country] => US [patent_app_date] => 2014-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 123 [patent_figures_cnt] => 123 [patent_no_of_words] => 36677 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15022381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/022381
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD Sep 11, 2014 Abandoned
Array ( [id] => 11042408 [patent_doc_number] => 20160239364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'METHOD OF VERIFYING INTEGRITY OF PROGRAM USING HASH' [patent_app_type] => utility [patent_app_number] => 15/024635 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15024635 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/024635
Method of verifying integrity of program using hash Sep 2, 2014 Issued
Array ( [id] => 9903488 [patent_doc_number] => 20150058688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'SYSTEM AND METHOD FOR SHARING A COMMUNICATIONS LINK BETWEEN MULTIPLE COMMUNICATIONS PROTOCOLS' [patent_app_type] => utility [patent_app_number] => 14/475894 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 183 [patent_figures_cnt] => 183 [patent_no_of_words] => 67403 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475894 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475894
IC test adapter circuitry having scan control register bits Sep 2, 2014 Issued
Array ( [id] => 10625258 [patent_doc_number] => 09344218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-17 [patent_title] => 'Error resilience for interactive real-time multimedia applications' [patent_app_type] => utility [patent_app_number] => 14/462266 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5511 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14462266 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/462266
Error resilience for interactive real-time multimedia applications Aug 17, 2014 Issued
Array ( [id] => 9891643 [patent_doc_number] => 08977918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'IC with connections between linking module and test access ports' [patent_app_type] => utility [patent_app_number] => 14/460824 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6044 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460824 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/460824
IC with connections between linking module and test access ports Aug 14, 2014 Issued
Array ( [id] => 11940368 [patent_doc_number] => 20170244519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'PMI Selection' [patent_app_type] => utility [patent_app_number] => 15/503546 [patent_app_country] => US [patent_app_date] => 2014-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9637 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15503546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/503546
PMI Selection Aug 13, 2014 Abandoned
Array ( [id] => 11810854 [patent_doc_number] => 09715424 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-25 [patent_title] => 'Memory device and repair method with column-based error code tracking' [patent_app_type] => utility [patent_app_number] => 14/458546 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458546 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/458546
Memory device and repair method with column-based error code tracking Aug 12, 2014 Issued
Array ( [id] => 11831531 [patent_doc_number] => 09728279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Memory system including a memory device, and methods of operating the memory system and the memory device' [patent_app_type] => utility [patent_app_number] => 14/456572 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 12262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456572 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456572
Memory system including a memory device, and methods of operating the memory system and the memory device Aug 10, 2014 Issued
Array ( [id] => 11232095 [patent_doc_number] => 09459319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Device and method for generating input control signals of a serialized compressed scan circuit' [patent_app_type] => utility [patent_app_number] => 14/446342 [patent_app_country] => US [patent_app_date] => 2014-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12954 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14446342 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/446342
Device and method for generating input control signals of a serialized compressed scan circuit Jul 29, 2014 Issued
Array ( [id] => 10526285 [patent_doc_number] => 09252810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Memory system and method of controlling memory system' [patent_app_type] => utility [patent_app_number] => 14/445229 [patent_app_country] => US [patent_app_date] => 2014-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5159 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14445229 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/445229
Memory system and method of controlling memory system Jul 28, 2014 Issued
Array ( [id] => 11484090 [patent_doc_number] => 09590658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-07 [patent_title] => 'High-speed low-power LDPC decoder design' [patent_app_type] => utility [patent_app_number] => 14/444712 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7974 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14444712 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/444712
High-speed low-power LDPC decoder design Jul 27, 2014 Issued
Array ( [id] => 9903484 [patent_doc_number] => 20150058684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'TEST METHOD, INFORMATION PROCESSING DEVICE, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 14/333770 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333770
TEST METHOD, INFORMATION PROCESSING DEVICE, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM Jul 16, 2014 Abandoned
Array ( [id] => 10674637 [patent_doc_number] => 20160020783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Low Density Parity Check Decoder With Relative Indexing' [patent_app_type] => utility [patent_app_number] => 14/334125 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334125 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334125
Low Density Parity Check Decoder With Relative Indexing Jul 16, 2014 Abandoned
Array ( [id] => 11430991 [patent_doc_number] => 09569308 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-14 [patent_title] => 'Reduced-overhead error detection and correction' [patent_app_type] => utility [patent_app_number] => 14/328941 [patent_app_country] => US [patent_app_date] => 2014-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7267 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328941 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328941
Reduced-overhead error detection and correction Jul 10, 2014 Issued
Array ( [id] => 10171014 [patent_doc_number] => 09201722 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-01 [patent_title] => 'System-on-chip and method for sending data in a system-on-chip' [patent_app_type] => utility [patent_app_number] => 14/327675 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5847 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327675 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/327675
System-on-chip and method for sending data in a system-on-chip Jul 9, 2014 Issued
Array ( [id] => 11467509 [patent_doc_number] => 09584159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Interleaved encoding' [patent_app_type] => utility [patent_app_number] => 14/323857 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6955 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/323857
Interleaved encoding Jul 2, 2014 Issued
Array ( [id] => 10139192 [patent_doc_number] => 09172520 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-27 [patent_title] => 'Terminal, network node, system and methods for soft buffer handling in carrier aggregation' [patent_app_type] => utility [patent_app_number] => 14/320934 [patent_app_country] => US [patent_app_date] => 2014-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 8496 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/320934
Terminal, network node, system and methods for soft buffer handling in carrier aggregation Jun 30, 2014 Issued
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