
Christine Trinh Le Tu
Examiner (ID: 15624, Phone: (571)272-3831 , Office: P/2117 )
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2313, 2117, 2133, 2785, 2138, 2111, 2413, 2784 |
| Total Applications | 1748 |
| Issued Applications | 1571 |
| Pending Applications | 27 |
| Abandoned Applications | 152 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7137356
[patent_doc_number] => 20040044491
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Test circuit provided with built-in self test function'
[patent_app_type] => new
[patent_app_number] => 10/647378
[patent_app_country] => US
[patent_app_date] => 2003-08-26
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[pdf_file] => publications/A1/0044/20040044491.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/647378 | Test circuit provided with built-in self test function | Aug 25, 2003 | Issued |
Array
(
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[patent_doc_number] => 20040177302
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[patent_issue_date] => 2004-09-09
[patent_title] => 'Apparatus for testing semiconductor integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/647267 | Apparatus for testing semiconductor integrated circuit | Aug 25, 2003 | Issued |
Array
(
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[patent_doc_number] => 20050049810
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[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'METHOD AND SYSTEM FOR DETERMINING MINIMUM POST PRODUCTION TEST TIME REQUIRED ON AN INTEGRATED CIRCUIT DEVICE TO ACHIEVE OPTIMUM RELIABILITY'
[patent_app_type] => utility
[patent_app_number] => 10/604887
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604887 | Method and system for determining minimum post production test time required on an integrated circuit device to achieve optimum reliability | Aug 24, 2003 | Issued |
Array
(
[id] => 340462
[patent_doc_number] => 07506227
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[patent_issue_date] => 2009-03-17
[patent_title] => 'Integrated circuit with embedded identification code'
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[patent_app_number] => 10/525598
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[patent_app_date] => 2003-07-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/525598 | Integrated circuit with embedded identification code | Jul 30, 2003 | Issued |
Array
(
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[patent_issue_date] => 2008-01-01
[patent_title] => 'Method and apparatus for automatic rate adaptation in a DOCSIS upstream'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632660 | Method and apparatus for automatic rate adaptation in a DOCSIS upstream | Jul 30, 2003 | Issued |
Array
(
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[patent_title] => 'Method, system and apparatus for aggregating failures across multiple memories and applying a common defect repair solution to all of the multiple memories'
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[patent_app_number] => 10/604195
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Array
(
[id] => 7450006
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[patent_issue_date] => 2004-12-30
[patent_title] => 'DIAGNOSABLE SCAN CHAIN'
[patent_app_type] => new
[patent_app_number] => 10/604194
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604194 | Diagnosable scan chain | Jun 29, 2003 | Issued |
Array
(
[id] => 626493
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[patent_issue_date] => 2006-11-21
[patent_title] => 'Test apparatus to facilitate building and testing complex computer products with contract manufacturers without proprietary information'
[patent_app_type] => utility
[patent_app_number] => 10/603900
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/603900 | Test apparatus to facilitate building and testing complex computer products with contract manufacturers without proprietary information | Jun 24, 2003 | Issued |
Array
(
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[patent_title] => 'Code error corrector'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/464921 | Code error corrector | Jun 18, 2003 | Issued |
Array
(
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[patent_issue_date] => 2007-04-24
[patent_title] => 'Apparatus and methods for assessing reliability of assemblies using programmable logic devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/465139 | Apparatus and methods for assessing reliability of assemblies using programmable logic devices | Jun 18, 2003 | Issued |
Array
(
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[patent_title] => 'Systems and methods for facilitating testing of pads of integrated circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/464046 | Systems and methods for facilitating testing of pads of integrated circuits | Jun 17, 2003 | Issued |
Array
(
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Array
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Array
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Array
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Array
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Array
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Array
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