Search

Christine Trinh Le Tu

Examiner (ID: 15624, Phone: (571)272-3831 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2313, 2117, 2133, 2785, 2138, 2111, 2413, 2784
Total Applications
1748
Issued Applications
1571
Pending Applications
27
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 762098 [patent_doc_number] => 07020815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'Memory technology test apparatus' [patent_app_type] => utility [patent_app_number] => 10/230211 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5005 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/020/07020815.pdf [firstpage_image] =>[orig_patent_app_number] => 10230211 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230211
Memory technology test apparatus Aug 28, 2002 Issued
Array ( [id] => 7138700 [patent_doc_number] => 20040044932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Output data compression scheme using tri-state' [patent_app_type] => new [patent_app_number] => 10/229702 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20040044932.pdf [firstpage_image] =>[orig_patent_app_number] => 10229702 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229702
Output data compression scheme using tri-state Aug 27, 2002 Issued
Array ( [id] => 1040080 [patent_doc_number] => 06874108 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock' [patent_app_type] => utility [patent_app_number] => 10/228444 [patent_app_country] => US [patent_app_date] => 2002-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6480 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874108.pdf [firstpage_image] =>[orig_patent_app_number] => 10228444 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/228444
Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock Aug 26, 2002 Issued
Array ( [id] => 1046391 [patent_doc_number] => 06868512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Fault detection system with real-time database' [patent_app_type] => utility [patent_app_number] => 10/229226 [patent_app_country] => US [patent_app_date] => 2002-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3451 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/868/06868512.pdf [firstpage_image] =>[orig_patent_app_number] => 10229226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229226
Fault detection system with real-time database Aug 26, 2002 Issued
Array ( [id] => 958256 [patent_doc_number] => 06957372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Repair of address-specific leakage' [patent_app_type] => utility [patent_app_number] => 10/228152 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1669 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957372.pdf [firstpage_image] =>[orig_patent_app_number] => 10228152 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/228152
Repair of address-specific leakage Aug 25, 2002 Issued
Array ( [id] => 7618385 [patent_doc_number] => 06944808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Method of evaluating core based system-on-a-chip' [patent_app_type] => utility [patent_app_number] => 10/225930 [patent_app_country] => US [patent_app_date] => 2002-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4984 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/944/06944808.pdf [firstpage_image] =>[orig_patent_app_number] => 10225930 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225930
Method of evaluating core based system-on-a-chip Aug 21, 2002 Issued
Array ( [id] => 6764741 [patent_doc_number] => 20030099139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Memory test apparatus and method of testing' [patent_app_type] => new [patent_app_number] => 10/225528 [patent_app_country] => US [patent_app_date] => 2002-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8807 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20030099139.pdf [firstpage_image] =>[orig_patent_app_number] => 10225528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225528
Memory test apparatus and method of testing Aug 21, 2002 Abandoned
Array ( [id] => 1052664 [patent_doc_number] => 06862705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'System and method for testing high pin count electronic devices using a test board with test channels' [patent_app_type] => utility [patent_app_number] => 10/224894 [patent_app_country] => US [patent_app_date] => 2002-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7105 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862705.pdf [firstpage_image] =>[orig_patent_app_number] => 10224894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/224894
System and method for testing high pin count electronic devices using a test board with test channels Aug 20, 2002 Issued
Array ( [id] => 6763162 [patent_doc_number] => 20030126524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Semiconductor storage unit' [patent_app_type] => new [patent_app_number] => 10/223349 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 10535 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126524.pdf [firstpage_image] =>[orig_patent_app_number] => 10223349 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223349
Semiconductor storage unit Aug 19, 2002 Abandoned
Array ( [id] => 1004794 [patent_doc_number] => 06910167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Remote module for a communications network' [patent_app_type] => utility [patent_app_number] => 10/223232 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8915 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/910/06910167.pdf [firstpage_image] =>[orig_patent_app_number] => 10223232 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223232
Remote module for a communications network Aug 14, 2002 Issued
Array ( [id] => 6734593 [patent_doc_number] => 20030012228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Information data multiplex transmission, system, its multiplexer and demultiplexer, and error correction encoder and decoder' [patent_app_type] => new [patent_app_number] => 10/199091 [patent_app_country] => US [patent_app_date] => 2002-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 35162 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20030012228.pdf [firstpage_image] =>[orig_patent_app_number] => 10199091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/199091
Information data multiplex transmission, system, its multiplexer and demultiplexer, and error correction encoder and decoder Jul 21, 2002 Issued
Array ( [id] => 6689839 [patent_doc_number] => 20030033565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'High-performance low-memory interleaver banks for turbo-codes' [patent_app_type] => new [patent_app_number] => 10/165122 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5981 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033565.pdf [firstpage_image] =>[orig_patent_app_number] => 10165122 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/165122
High-performance low-memory interleaver banks for turbo-codes Jun 6, 2002 Issued
Array ( [id] => 6679687 [patent_doc_number] => 20030229828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Arrangements for self-measurement of I/O timing' [patent_app_type] => new [patent_app_number] => 10/162671 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7120 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20030229828.pdf [firstpage_image] =>[orig_patent_app_number] => 10162671 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162671
Arrangements for self-measurement of I/O timing Jun 5, 2002 Issued
Array ( [id] => 6321104 [patent_doc_number] => 20020196687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Methods and apparatus for analyzing and repairing memory' [patent_app_type] => new [patent_app_number] => 10/164513 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8777 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20020196687.pdf [firstpage_image] =>[orig_patent_app_number] => 10164513 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/164513
Methods and apparatus for analyzing and repairing memory Jun 5, 2002 Abandoned
Array ( [id] => 726356 [patent_doc_number] => 07051250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-23 [patent_title] => 'Routing workpieces based upon detecting a fault' [patent_app_type] => utility [patent_app_number] => 10/164091 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4247 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/051/07051250.pdf [firstpage_image] =>[orig_patent_app_number] => 10164091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/164091
Routing workpieces based upon detecting a fault Jun 5, 2002 Issued
Array ( [id] => 6265701 [patent_doc_number] => 20020188899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Memory control circuit' [patent_app_type] => new [patent_app_number] => 10/161645 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5045 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20020188899.pdf [firstpage_image] =>[orig_patent_app_number] => 10161645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/161645
Memory control circuit Jun 4, 2002 Issued
Array ( [id] => 757973 [patent_doc_number] => 07024607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'DVI link with parallel test data' [patent_app_type] => utility [patent_app_number] => 10/163284 [patent_app_country] => US [patent_app_date] => 2002-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5797 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/024/07024607.pdf [firstpage_image] =>[orig_patent_app_number] => 10163284 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163284
DVI link with parallel test data Jun 3, 2002 Issued
Array ( [id] => 1043273 [patent_doc_number] => 06871310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Binary time-frame expansion of sequential systems' [patent_app_type] => utility [patent_app_number] => 10/162018 [patent_app_country] => US [patent_app_date] => 2002-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/871/06871310.pdf [firstpage_image] =>[orig_patent_app_number] => 10162018 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162018
Binary time-frame expansion of sequential systems Jun 2, 2002 Issued
Array ( [id] => 1210537 [patent_doc_number] => 06718501 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Copy protected digital audio compact disc and method and system for producing same' [patent_app_type] => B1 [patent_app_number] => 10/148502 [patent_app_country] => US [patent_app_date] => 2002-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 16766 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718501.pdf [firstpage_image] =>[orig_patent_app_number] => 10148502 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/148502
Copy protected digital audio compact disc and method and system for producing same May 27, 2002 Issued
Array ( [id] => 5910663 [patent_doc_number] => 20020144198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method to prevent inadvertent test mode entry' [patent_app_type] => new [patent_app_number] => 10/155398 [patent_app_country] => US [patent_app_date] => 2002-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2445 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20020144198.pdf [firstpage_image] =>[orig_patent_app_number] => 10155398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/155398
Method to prevent inadvertent test mode entry May 21, 2002 Issued
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