Search

Christine Trinh Le Tu

Examiner (ID: 15624, Phone: (571)272-3831 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2313, 2117, 2133, 2785, 2138, 2111, 2413, 2784
Total Applications
1748
Issued Applications
1571
Pending Applications
27
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 953404 [patent_doc_number] => 06961879 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-01 [patent_title] => 'Apparatus and method for counting error rates in an optical compact disc storage system' [patent_app_type] => utility [patent_app_number] => 09/578217 [patent_app_country] => US [patent_app_date] => 2000-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6338 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961879.pdf [firstpage_image] =>[orig_patent_app_number] => 09578217 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/578217
Apparatus and method for counting error rates in an optical compact disc storage system May 22, 2000 Issued
Array ( [id] => 1109999 [patent_doc_number] => 06813741 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'Address counter test mode for memory device' [patent_app_type] => B1 [patent_app_number] => 09/573767 [patent_app_country] => US [patent_app_date] => 2000-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2883 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813741.pdf [firstpage_image] =>[orig_patent_app_number] => 09573767 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/573767
Address counter test mode for memory device May 17, 2000 Issued
Array ( [id] => 1365888 [patent_doc_number] => 06581182 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Iterative decoding with post-processing of detected encoded data' [patent_app_type] => B1 [patent_app_number] => 09/570764 [patent_app_country] => US [patent_app_date] => 2000-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4554 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581182.pdf [firstpage_image] =>[orig_patent_app_number] => 09570764 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570764
Iterative decoding with post-processing of detected encoded data May 14, 2000 Issued
Array ( [id] => 1258600 [patent_doc_number] => 06671835 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Error detection in digital scanning device having parallel data streams' [patent_app_type] => B1 [patent_app_number] => 09/571086 [patent_app_country] => US [patent_app_date] => 2000-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4263 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671835.pdf [firstpage_image] =>[orig_patent_app_number] => 09571086 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/571086
Error detection in digital scanning device having parallel data streams May 14, 2000 Issued
Array ( [id] => 1225961 [patent_doc_number] => 06704899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Method and device for secure transmission of data signals over a bus system' [patent_app_type] => B1 [patent_app_number] => 09/569469 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704899.pdf [firstpage_image] =>[orig_patent_app_number] => 09569469 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569469
Method and device for secure transmission of data signals over a bus system May 11, 2000 Issued
Array ( [id] => 1250321 [patent_doc_number] => 06675345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method and apparatus for detecting errors in DVD data' [patent_app_type] => B1 [patent_app_number] => 09/569676 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5155 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675345.pdf [firstpage_image] =>[orig_patent_app_number] => 09569676 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569676
Method and apparatus for detecting errors in DVD data May 11, 2000 Issued
Array ( [id] => 1250325 [patent_doc_number] => 06675349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Error correction coding of data blocks with included parity bits' [patent_app_type] => B1 [patent_app_number] => 09/568919 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6634 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675349.pdf [firstpage_image] =>[orig_patent_app_number] => 09568919 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/568919
Error correction coding of data blocks with included parity bits May 10, 2000 Issued
Array ( [id] => 1040086 [patent_doc_number] => 06874110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'Apparatus and method for self testing programmable logic arrays' [patent_app_type] => utility [patent_app_number] => 09/569741 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11103 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874110.pdf [firstpage_image] =>[orig_patent_app_number] => 09569741 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569741
Apparatus and method for self testing programmable logic arrays May 10, 2000 Issued
Array ( [id] => 1178003 [patent_doc_number] => 06760877 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method for forming acknowledgement data in a wireless communication system and a wireless communication system' [patent_app_type] => B1 [patent_app_number] => 09/569007 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10870 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760877.pdf [firstpage_image] =>[orig_patent_app_number] => 09569007 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569007
Method for forming acknowledgement data in a wireless communication system and a wireless communication system May 10, 2000 Issued
Array ( [id] => 7633003 [patent_doc_number] => 06658617 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Handling a 1-hot multiplexer during built-in self-testing of logic' [patent_app_type] => B1 [patent_app_number] => 09/570158 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3480 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658617.pdf [firstpage_image] =>[orig_patent_app_number] => 09570158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570158
Handling a 1-hot multiplexer during built-in self-testing of logic May 10, 2000 Issued
Array ( [id] => 1329387 [patent_doc_number] => 06606718 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Product code with interleaving to enhance error detection and correction' [patent_app_type] => B1 [patent_app_number] => 09/569129 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6028 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/606/06606718.pdf [firstpage_image] =>[orig_patent_app_number] => 09569129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569129
Product code with interleaving to enhance error detection and correction May 10, 2000 Issued
Array ( [id] => 7962127 [patent_doc_number] => 06681366 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'System and method for detecting errors in a system where clients arbitrate amongst themselves for a grant to a central resource' [patent_app_type] => B1 [patent_app_number] => 09/569986 [patent_app_country] => US [patent_app_date] => 2000-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3446 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/681/06681366.pdf [firstpage_image] =>[orig_patent_app_number] => 09569986 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569986
System and method for detecting errors in a system where clients arbitrate amongst themselves for a grant to a central resource May 10, 2000 Issued
Array ( [id] => 1025048 [patent_doc_number] => 06889357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'Timing calibration pattern for SLDRAM' [patent_app_type] => utility [patent_app_number] => 09/568155 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4305 [patent_no_of_claims] => 94 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/889/06889357.pdf [firstpage_image] =>[orig_patent_app_number] => 09568155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/568155
Timing calibration pattern for SLDRAM May 9, 2000 Issued
Array ( [id] => 1179525 [patent_doc_number] => 06757865 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Turbo-code error correcting decoder, turbo-code error correction decoding method, turbo-code decoding apparatus, and turbo-code decoding system' [patent_app_type] => B1 [patent_app_number] => 09/568163 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 12860 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757865.pdf [firstpage_image] =>[orig_patent_app_number] => 09568163 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/568163
Turbo-code error correcting decoder, turbo-code error correction decoding method, turbo-code decoding apparatus, and turbo-code decoding system May 9, 2000 Issued
Array ( [id] => 1292284 [patent_doc_number] => 06643805 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Memory circuit being capable of compression test' [patent_app_type] => B1 [patent_app_number] => 09/568123 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7966 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643805.pdf [firstpage_image] =>[orig_patent_app_number] => 09568123 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/568123
Memory circuit being capable of compression test May 9, 2000 Issued
Array ( [id] => 1348639 [patent_doc_number] => 06598188 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Error-corrected codeword configuration and method' [patent_app_type] => B1 [patent_app_number] => 09/569104 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 7760 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598188.pdf [firstpage_image] =>[orig_patent_app_number] => 09569104 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569104
Error-corrected codeword configuration and method May 9, 2000 Issued
Array ( [id] => 1292406 [patent_doc_number] => 06643823 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Waveform generating circuit' [patent_app_type] => B1 [patent_app_number] => 09/567256 [patent_app_country] => US [patent_app_date] => 2000-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2365 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643823.pdf [firstpage_image] =>[orig_patent_app_number] => 09567256 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/567256
Waveform generating circuit May 8, 2000 Issued
Array ( [id] => 1236593 [patent_doc_number] => 06694472 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Error correction for frames carried over multiple networks' [patent_app_type] => B1 [patent_app_number] => 09/567512 [patent_app_country] => US [patent_app_date] => 2000-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3987 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694472.pdf [firstpage_image] =>[orig_patent_app_number] => 09567512 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/567512
Error correction for frames carried over multiple networks May 8, 2000 Issued
Array ( [id] => 1382448 [patent_doc_number] => 06574757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Integrated circuit semiconductor device having built-in self-repair circuit for embedded memory and method for repairing the memory' [patent_app_type] => B1 [patent_app_number] => 09/566346 [patent_app_country] => US [patent_app_date] => 2000-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 9756 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574757.pdf [firstpage_image] =>[orig_patent_app_number] => 09566346 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/566346
Integrated circuit semiconductor device having built-in self-repair circuit for embedded memory and method for repairing the memory May 7, 2000 Issued
Array ( [id] => 1260638 [patent_doc_number] => 06668347 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Built-in self-testing for embedded memory' [patent_app_type] => B1 [patent_app_number] => 09/566621 [patent_app_country] => US [patent_app_date] => 2000-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2480 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668347.pdf [firstpage_image] =>[orig_patent_app_number] => 09566621 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/566621
Built-in self-testing for embedded memory May 7, 2000 Issued
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