Christine Trinh Le Tu

Array ( [id] => 1495502 [patent_doc_number] => 06418550 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Line error checking circuit for an electric data transmission system' [patent_app_type] => B1 [patent_app_number] => 09/431681 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418550.pdf [firstpage_image] =>[orig_patent_app_number] => 09431681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7644100 [patent_doc_number] => 06473874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method and system for managing timing error information' [patent_app_type] => B1 [patent_app_number] => 09/431461 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9444 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473874.pdf [firstpage_image] =>[orig_patent_app_number] => 09431461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1214629 [patent_doc_number] => 06715125 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Source coding and transmission with time diversity' [patent_app_type] => B1 [patent_app_number] => 09/420277 [patent_app_country] => US [patent_app_date] => 1999-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2373 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715125.pdf [firstpage_image] =>[orig_patent_app_number] => 09420277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4179842 [patent_doc_number] => 06115835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Method and apparatus for determining a set of tests for integrated circuit testing' [patent_app_type] => 1 [patent_app_number] => 9/364078 [patent_app_country] => US [patent_app_date] => 1999-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3094 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115835.pdf [firstpage_image] =>[orig_patent_app_number] => 364078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7638559 [patent_doc_number] => 06397362 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Fault diagnosis method and system for a sequential circuit' [patent_app_type] => B1 [patent_app_number] => 09/362856 [patent_app_country] => US [patent_app_date] => 1999-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 46 [patent_no_of_words] => 17637 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397362.pdf [firstpage_image] =>[orig_patent_app_number] => 09362856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1472081 [patent_doc_number] => 06460151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'System and method for predicting storage device failures' [patent_app_type] => B1 [patent_app_number] => 09/360566 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6200 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/460/06460151.pdf [firstpage_image] =>[orig_patent_app_number] => 09360566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1481332 [patent_doc_number] => 06389564 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'DRAM circuit having a testing unit and its testing method' [patent_app_type] => B1 [patent_app_number] => 09/360623 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2134 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389564.pdf [firstpage_image] =>[orig_patent_app_number] => 09360623 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1210532 [patent_doc_number] => 06718499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Mace code' [patent_app_type] => B1 [patent_app_number] => 09/360363 [patent_app_country] => US [patent_app_date] => 1999-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718499.pdf [firstpage_image] =>[orig_patent_app_number] => 09360363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1260631 [patent_doc_number] => 06668345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Synchronous semiconductor allowing replacement with redundant memory cell while maintaining access time' [patent_app_type] => B1 [patent_app_number] => 09/356337 [patent_app_country] => US [patent_app_date] => 1999-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 72 [patent_no_of_words] => 30290 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668345.pdf [firstpage_image] =>[orig_patent_app_number] => 09356337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1602333 [patent_doc_number] => 06493842 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Time-varying randomization for data synchronization and implicit information transmission' [patent_app_type] => B1 [patent_app_number] => 09/342275 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 35 [patent_no_of_words] => 14393 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493842.pdf [firstpage_image] =>[orig_patent_app_number] => 09342275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1475156 [patent_doc_number] => 06408414 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Semiconductor device provided with a boundary-scan test circuit' [patent_app_type] => B1 [patent_app_number] => 09/334827 [patent_app_country] => US [patent_app_date] => 1999-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 4546 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/408/06408414.pdf [firstpage_image] =>[orig_patent_app_number] => 09334827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 633503 [patent_doc_number] => 07134069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-07 [patent_title] => 'Method and apparatus for error detection and correction' [patent_app_type] => utility [patent_app_number] => 09/334238 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8866 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/134/07134069.pdf [firstpage_image] =>[orig_patent_app_number] => 09334238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1549768 [patent_doc_number] => 06374374 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Error processing circuit for a receiving location of a data transmission system' [patent_app_type] => B1 [patent_app_number] => 09/330475 [patent_app_country] => US [patent_app_date] => 1999-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6024 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374374.pdf [firstpage_image] =>[orig_patent_app_number] => 09330475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1325787 [patent_doc_number] => 06615381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Digital data transmitting/receiving method, base station unit used for transmitting/receiving digital data, and mobile object terminal unit used for transmitting/receiving digital data' [patent_app_type] => B1 [patent_app_number] => 09/328389 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 14134 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/615/06615381.pdf [firstpage_image] =>[orig_patent_app_number] => 09328389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1456932 [patent_doc_number] => 06457147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Method and system for run-time logic verification of operations in digital systems in response to a plurality of parameters' [patent_app_type] => B1 [patent_app_number] => 09/328301 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4846 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/457/06457147.pdf [firstpage_image] =>[orig_patent_app_number] => 09328301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1549817 [patent_doc_number] => 06374383 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Determining error locations using error correction codes' [patent_app_type] => B1 [patent_app_number] => 09/327285 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4759 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374383.pdf [firstpage_image] =>[orig_patent_app_number] => 09327285 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4269822 [patent_doc_number] => 06138258 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Circuit and method to prevent inadvertent test mode entry' [patent_app_type] => 1 [patent_app_number] => 9/324738 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2375 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138258.pdf [firstpage_image] =>[orig_patent_app_number] => 324738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4281675 [patent_doc_number] => 06260171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Digital data recording channel' [patent_app_type] => 1 [patent_app_number] => 9/316351 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 11527 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/260/06260171.pdf [firstpage_image] =>[orig_patent_app_number] => 316351 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4347281 [patent_doc_number] => 06330700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Out-of-band forward error correction' [patent_app_type] => 1 [patent_app_number] => 9/314580 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 16740 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330700.pdf [firstpage_image] =>[orig_patent_app_number] => 314580 [rel_patent_id] =>[rel_patent_doc_number] =>)