Christine Trinh Le Tu

Array ( [id] => 3516551 [patent_doc_number] => 05515386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Transmission circuit for transmitting fixed-length data' [patent_app_type] => 1 [patent_app_number] => 8/311727 [patent_app_country] => US [patent_app_date] => 1994-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 6400 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/515/05515386.pdf [firstpage_image] =>[orig_patent_app_number] => 311727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3507130 [patent_doc_number] => 05509119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Fast comparison method and apparatus for error corrected cache tags' [patent_app_type] => 1 [patent_app_number] => 8/311478 [patent_app_country] => US [patent_app_date] => 1994-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2840 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/509/05509119.pdf [firstpage_image] =>[orig_patent_app_number] => 311478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3599886 [patent_doc_number] => 05497459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'System for testing instruction queue circuit and central processing unit having the system' [patent_app_type] => 1 [patent_app_number] => 8/297246 [patent_app_country] => US [patent_app_date] => 1994-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 4775 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497459.pdf [firstpage_image] =>[orig_patent_app_number] => 297246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3502968 [patent_doc_number] => 05440728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/292046 [patent_app_country] => US [patent_app_date] => 1994-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5393 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/440/05440728.pdf [firstpage_image] =>[orig_patent_app_number] => 292046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3563161 [patent_doc_number] => 05493574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Power efficient RAM disk and a method of emulating a rotating memory disk' [patent_app_type] => 1 [patent_app_number] => 8/280161 [patent_app_country] => US [patent_app_date] => 1994-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 5400 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/493/05493574.pdf [firstpage_image] =>[orig_patent_app_number] => 280161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3452251 [patent_doc_number] => 05398254 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-14 [patent_title] => 'Error correction encoding/decoding method and apparatus therefor' [patent_app_type] => 1 [patent_app_number] => 8/275658 [patent_app_country] => US [patent_app_date] => 1994-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2371 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/398/05398254.pdf [firstpage_image] =>[orig_patent_app_number] => 275658 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3742090 [patent_doc_number] => 05636227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Integrated circuit test mechansim and method' [patent_app_type] => 1 [patent_app_number] => 8/273097 [patent_app_country] => US [patent_app_date] => 1994-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2607 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636227.pdf [firstpage_image] =>[orig_patent_app_number] => 273097 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3599565 [patent_doc_number] => 05517514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Parity checking system with reduced usage of I/O pins' [patent_app_type] => 1 [patent_app_number] => 8/271936 [patent_app_country] => US [patent_app_date] => 1994-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3127 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517514.pdf [firstpage_image] =>[orig_patent_app_number] => 271936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3739223 [patent_doc_number] => 05671231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Method and apparatus for performing cache snoop testing on a cache system' [patent_app_type] => 1 [patent_app_number] => 8/271616 [patent_app_country] => US [patent_app_date] => 1994-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4826 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671231.pdf [firstpage_image] =>[orig_patent_app_number] => 271616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3969319 [patent_doc_number] => 05948111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Real time comparison of integrated circuit operation' [patent_app_type] => 1 [patent_app_number] => 8/271238 [patent_app_country] => US [patent_app_date] => 1994-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 8153 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/948/05948111.pdf [firstpage_image] =>[orig_patent_app_number] => 271238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3561828 [patent_doc_number] => 05572535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Method and data processing system for verifying the correct operation of a tri-state multiplexer in a circuit design' [patent_app_type] => 1 [patent_app_number] => 8/270601 [patent_app_country] => US [patent_app_date] => 1994-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5568 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572535.pdf [firstpage_image] =>[orig_patent_app_number] => 270601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3660603 [patent_doc_number] => 05638511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Method of maintaining security in a common output means and system for maintaining security' [patent_app_type] => 1 [patent_app_number] => 8/267598 [patent_app_country] => US [patent_app_date] => 1994-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 49 [patent_no_of_words] => 29850 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638511.pdf [firstpage_image] =>[orig_patent_app_number] => 267598 [rel_patent_id] =>[rel_patent_doc_number] =>)