| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3484556
[patent_doc_number] => 05428629
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-27
[patent_title] => 'Error check code recomputation method time independent of message length'
[patent_app_type] => 1
[patent_app_number] => 8/263902
[patent_app_country] => US
[patent_app_date] => 1994-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 7525
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 565
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/428/05428629.pdf
[firstpage_image] =>[orig_patent_app_number] => 263902
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/263902 | Error check code recomputation method time independent of message length | Jun 19, 1994 | Issued |
Array
(
[id] => 3625294
[patent_doc_number] => 05566297
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'Non-disruptive recovery from file server failure in a highly available file system for clustered computing environments'
[patent_app_type] => 1
[patent_app_number] => 8/260868
[patent_app_country] => US
[patent_app_date] => 1994-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2661
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/566/05566297.pdf
[firstpage_image] =>[orig_patent_app_number] => 260868
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/260868 | Non-disruptive recovery from file server failure in a highly available file system for clustered computing environments | Jun 15, 1994 | Issued |
Array
(
[id] => 1567685
[patent_doc_number] => 06438718
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination'
[patent_app_type] => B1
[patent_app_number] => 08/259798
[patent_app_country] => US
[patent_app_date] => 1994-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 40
[patent_no_of_words] => 4610
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/438/06438718.pdf
[firstpage_image] =>[orig_patent_app_number] => 08259798
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/259798 | Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination | Jun 14, 1994 | Issued |
| 08/246380 | SYSTEM AND METHOD FOR LOGICAL CONSOLE VERIFICATION AND FALLBACK | May 19, 1994 | Abandoned |
Array
(
[id] => 3659242
[patent_doc_number] => 05630048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-13
[patent_title] => 'Diagnostic system for run-time monitoring of computer operations'
[patent_app_type] => 1
[patent_app_number] => 8/246058
[patent_app_country] => US
[patent_app_date] => 1994-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 15514
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 296
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/630/05630048.pdf
[firstpage_image] =>[orig_patent_app_number] => 246058
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/246058 | Diagnostic system for run-time monitoring of computer operations | May 18, 1994 | Issued |
Array
(
[id] => 3474386
[patent_doc_number] => 05469565
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Personal computer for disabling resume mode upon replacement of HDD'
[patent_app_type] => 1
[patent_app_number] => 8/246157
[patent_app_country] => US
[patent_app_date] => 1994-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2690
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469565.pdf
[firstpage_image] =>[orig_patent_app_number] => 246157
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/246157 | Personal computer for disabling resume mode upon replacement of HDD | May 18, 1994 | Issued |
| 08/240290 | SYNCHRONIZING A PREDICTION RAM | May 8, 1994 | Abandoned |
Array
(
[id] => 3511057
[patent_doc_number] => 05533192
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Computer program debugging system and method'
[patent_app_type] => 1
[patent_app_number] => 8/230798
[patent_app_country] => US
[patent_app_date] => 1994-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 28
[patent_no_of_words] => 11344
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/533/05533192.pdf
[firstpage_image] =>[orig_patent_app_number] => 230798
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/230798 | Computer program debugging system and method | Apr 20, 1994 | Issued |
Array
(
[id] => 4195810
[patent_doc_number] => 06085348
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Error correction code encoder and decoder'
[patent_app_type] => 1
[patent_app_number] => 8/227694
[patent_app_country] => US
[patent_app_date] => 1994-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3553
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/085/06085348.pdf
[firstpage_image] =>[orig_patent_app_number] => 227694
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/227694 | Error correction code encoder and decoder | Apr 13, 1994 | Issued |
Array
(
[id] => 4427343
[patent_doc_number] => 06226766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-01
[patent_title] => 'Method and apparatus for built-in self-test of smart memories'
[patent_app_type] => 1
[patent_app_number] => 8/224407
[patent_app_country] => US
[patent_app_date] => 1994-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3449
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/226/06226766.pdf
[firstpage_image] =>[orig_patent_app_number] => 224407
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/224407 | Method and apparatus for built-in self-test of smart memories | Apr 6, 1994 | Issued |
| 08/208071 | FAULT CLEARANCE AND RECOVERY IN AN ELECTRONIC REPROGRAPHIC SYSTEM | Mar 8, 1994 | Abandoned |
Array
(
[id] => 3567729
[patent_doc_number] => 05502733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Data transfer device'
[patent_app_type] => 1
[patent_app_number] => 8/205144
[patent_app_country] => US
[patent_app_date] => 1994-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9077
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/502/05502733.pdf
[firstpage_image] =>[orig_patent_app_number] => 205144
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/205144 | Data transfer device | Mar 1, 1994 | Issued |
Array
(
[id] => 3472678
[patent_doc_number] => 05469448
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Encoding/decoding circuit, and digital video system comprising the circuit'
[patent_app_type] => 1
[patent_app_number] => 8/193613
[patent_app_country] => US
[patent_app_date] => 1994-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5199
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 571
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469448.pdf
[firstpage_image] =>[orig_patent_app_number] => 193613
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/193613 | Encoding/decoding circuit, and digital video system comprising the circuit | Feb 7, 1994 | Issued |
Array
(
[id] => 3598743
[patent_doc_number] => 05550844
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Printed circuit board fault injection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/187783
[patent_app_country] => US
[patent_app_date] => 1994-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2888
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/550/05550844.pdf
[firstpage_image] =>[orig_patent_app_number] => 187783
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/187783 | Printed circuit board fault injection circuit | Jan 24, 1994 | Issued |
Array
(
[id] => 3602840
[patent_doc_number] => 05488716
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'Fault tolerant computer system with shadow virtual processor'
[patent_app_type] => 1
[patent_app_number] => 8/182311
[patent_app_country] => US
[patent_app_date] => 1994-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 6295
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/488/05488716.pdf
[firstpage_image] =>[orig_patent_app_number] => 182311
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/182311 | Fault tolerant computer system with shadow virtual processor | Jan 13, 1994 | Issued |
Array
(
[id] => 3067368
[patent_doc_number] => 05351244
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-27
[patent_title] => 'Seismic transmission method and device for a very low error rate'
[patent_app_type] => 1
[patent_app_number] => 8/162384
[patent_app_country] => US
[patent_app_date] => 1993-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3393
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 411
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/351/05351244.pdf
[firstpage_image] =>[orig_patent_app_number] => 162384
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/162384 | Seismic transmission method and device for a very low error rate | Dec 6, 1993 | Issued |
Array
(
[id] => 4039772
[patent_doc_number] => 05903575
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-11
[patent_title] => 'Semiconductor memory device having fast data writing mode and method of writing testing data in fast data writing mode'
[patent_app_type] => 1
[patent_app_number] => 8/158837
[patent_app_country] => US
[patent_app_date] => 1993-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 20
[patent_no_of_words] => 19468
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/903/05903575.pdf
[firstpage_image] =>[orig_patent_app_number] => 158837
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/158837 | Semiconductor memory device having fast data writing mode and method of writing testing data in fast data writing mode | Nov 28, 1993 | Issued |
| 08/159048 | METHOD AND APPARATUS FOR COMPARING REAL TIME OPERATION OF OBJECT CODE COMPATIBLE PROCESSORS | Nov 28, 1993 | Abandoned |
| 08/155352 | BUS REQUEST ERROR DETECTION | Nov 21, 1993 | Abandoned |
| 08/143782 | CIRCUIT FOR TESTING MICROPROCESSOR MEMORIES | Oct 31, 1993 | Abandoned |