Search

Christine Trinh Le Tu

Examiner (ID: 2588)

Most Active Art Unit
2117
Art Unit(s)
2313, 2133, 2111, 2117, 2784, 2785, 2138, 2413
Total Applications
1748
Issued Applications
1570
Pending Applications
27
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16846697 [patent_doc_number] => 11018805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Apparatus and method of transmission using HARQ in communication or broadcasting system [patent_app_type] => utility [patent_app_number] => 16/752134 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 19307 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16752134 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/752134
Apparatus and method of transmission using HARQ in communication or broadcasting system Jan 23, 2020 Issued
Array ( [id] => 16192892 [patent_doc_number] => 20200233741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => CHANNEL MODULATION FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/744025 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744025
Channel modulation for a memory device Jan 14, 2020 Issued
Array ( [id] => 16779422 [patent_doc_number] => 20210116500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => METHOD OF TESTING MEMORY DEVICE EMPLOYING LIMITED NUMBER OF TEST PINS AND MEMORY DEVICE UTILIZING SAME [patent_app_type] => utility [patent_app_number] => 16/726098 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/726098
Method of testing memory device employing limited number of test pins and memory device utilizing same Dec 22, 2019 Issued
Array ( [id] => 16910392 [patent_doc_number] => 11042432 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-22 [patent_title] => Data storage device with dynamic stripe length manager [patent_app_type] => utility [patent_app_number] => 16/723513 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723513
Data storage device with dynamic stripe length manager Dec 19, 2019 Issued
Array ( [id] => 17516053 [patent_doc_number] => 11295209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Analysis of memory sub-systems based on threshold distributions [patent_app_type] => utility [patent_app_number] => 16/722507 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 11204 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722507 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722507
Analysis of memory sub-systems based on threshold distributions Dec 19, 2019 Issued
Array ( [id] => 18119256 [patent_doc_number] => 11550650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Methods for activity-based memory maintenance operations and memory devices and systems employing the same [patent_app_type] => utility [patent_app_number] => 16/707151 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5060 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707151
Methods for activity-based memory maintenance operations and memory devices and systems employing the same Dec 8, 2019 Issued
Array ( [id] => 16122029 [patent_doc_number] => 20200213037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => POLAR CODE ENCODING METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 16/706844 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706844
Polar code encoding method and device Dec 8, 2019 Issued
Array ( [id] => 15935997 [patent_doc_number] => 20200159632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SYSTEM AND METHOD FOR AN ADAPTIVE ELECTION IN SEMI-DISTRIBUTED ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 16/684080 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684080 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684080
System and method for an adaptive election in semi-distributed environments Nov 13, 2019 Issued
Array ( [id] => 16846589 [patent_doc_number] => 11018695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-25 [patent_title] => Fast-converging bit-flipping decoder for low-density parity-check codes [patent_app_type] => utility [patent_app_number] => 16/680330 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680330
Fast-converging bit-flipping decoder for low-density parity-check codes Nov 10, 2019 Issued
Array ( [id] => 17271011 [patent_doc_number] => 11196447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Computer-implemented method for error-correction-encoding and encrypting of a file [patent_app_type] => utility [patent_app_number] => 16/679770 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4635 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679770 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679770
Computer-implemented method for error-correction-encoding and encrypting of a file Nov 10, 2019 Issued
Array ( [id] => 16803085 [patent_doc_number] => 10998036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Memory controller, and memory system including the same and method thereof [patent_app_type] => utility [patent_app_number] => 16/678692 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 9057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678692 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678692
Memory controller, and memory system including the same and method thereof Nov 7, 2019 Issued
Array ( [id] => 16636891 [patent_doc_number] => 10915400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-09 [patent_title] => Dynamic over provisioning allocation for purposed blocks [patent_app_type] => utility [patent_app_number] => 16/679019 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679019
Dynamic over provisioning allocation for purposed blocks Nov 7, 2019 Issued
Array ( [id] => 17252928 [patent_doc_number] => 11188417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Memory system, memory module, and operation method of memory system [patent_app_type] => utility [patent_app_number] => 16/677362 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5134 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/677362
Memory system, memory module, and operation method of memory system Nov 6, 2019 Issued
Array ( [id] => 16400971 [patent_doc_number] => 20200341829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => ERROR CORRECTION DECODER AND MEMORY CONTROLLER HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/676320 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676320 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676320
Error correction decoder and memory controller having the same Nov 5, 2019 Issued
Array ( [id] => 17331467 [patent_doc_number] => 11221931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Memory system and data processing system [patent_app_type] => utility [patent_app_number] => 16/674935 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6126 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674935 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674935
Memory system and data processing system Nov 4, 2019 Issued
Array ( [id] => 17019059 [patent_doc_number] => 11088712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Iterative decoder performance prediction using machine learning [patent_app_type] => utility [patent_app_number] => 16/675165 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16675165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/675165
Iterative decoder performance prediction using machine learning Nov 4, 2019 Issued
Array ( [id] => 17650783 [patent_doc_number] => 11353506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Safety circuit and method for testing a safety circuit in an automation system [patent_app_type] => utility [patent_app_number] => 16/599935 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6006 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599935 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599935
Safety circuit and method for testing a safety circuit in an automation system Oct 10, 2019 Issued
Array ( [id] => 16767382 [patent_doc_number] => 10979175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Forward error correction for streaming data [patent_app_type] => utility [patent_app_number] => 16/599547 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8835 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599547 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599547
Forward error correction for streaming data Oct 10, 2019 Issued
Array ( [id] => 18917998 [patent_doc_number] => 11880277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Selecting an error correction code type for a memory device [patent_app_type] => utility [patent_app_number] => 16/582358 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6826 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582358
Selecting an error correction code type for a memory device Sep 24, 2019 Issued
Array ( [id] => 16415898 [patent_doc_number] => 10823781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-03 [patent_title] => Internally clocked logic built-in self-test apparatuses and methods [patent_app_type] => utility [patent_app_number] => 16/581869 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16581869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/581869
Internally clocked logic built-in self-test apparatuses and methods Sep 24, 2019 Issued
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