Search

Christopher A. Bartels

Examiner (ID: 4475, Phone: (571)270-3182 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
588
Issued Applications
356
Pending Applications
62
Abandoned Applications
186

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20043316 [patent_doc_number] => 20250181538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => CHIPLET HAVING SAVE AND FORWARD MODULE [patent_app_type] => utility [patent_app_number] => 18/939165 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939165
CHIPLET HAVING SAVE AND FORWARD MODULE Nov 5, 2024 Pending
Array ( [id] => 20323292 [patent_doc_number] => 20250335380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => METHOD AND SYSTEM FOR SHIFTING DATA WITHIN MEMORY [patent_app_type] => utility [patent_app_number] => 18/936875 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936875
METHOD AND SYSTEM FOR SHIFTING DATA WITHIN MEMORY Nov 3, 2024 Pending
Array ( [id] => 19892035 [patent_doc_number] => 20250117347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => Subgraph segmented optimization method based on inter-core storage access, and application [patent_app_type] => utility [patent_app_number] => 18/901294 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901294 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/901294
Subgraph segmented optimization method based on inter-core storage access, and application Sep 29, 2024 Pending
Array ( [id] => 19864729 [patent_doc_number] => 20250103515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => Dynamic Precision Control System for Peripheral Data Output with ResistiveSensors [patent_app_type] => utility [patent_app_number] => 18/896686 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/896686
Dynamic Precision Control System for Peripheral Data Output with ResistiveSensors Sep 24, 2024 Pending
Array ( [id] => 19819260 [patent_doc_number] => 20250077467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => ELECTRONIC DEVICE INCLUDING A PLURALITY OF CHIPLETS AND METHOD FOR TRANSMITTING TRANSACTION THEREOF [patent_app_type] => utility [patent_app_number] => 18/807835 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807835
ELECTRONIC DEVICE INCLUDING A PLURALITY OF CHIPLETS AND METHOD FOR TRANSMITTING TRANSACTION THEREOF Aug 15, 2024 Pending
Array ( [id] => 19603162 [patent_doc_number] => 20240394042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => INDEPENDENTLY UPGRADEABLE DOCKING STATIONS [patent_app_type] => utility [patent_app_number] => 18/792447 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9277 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -48 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18792447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/792447
INDEPENDENTLY UPGRADEABLE DOCKING STATIONS Jul 31, 2024 Pending
Array ( [id] => 19711371 [patent_doc_number] => 20250021513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => SYNCHRONIZATION SIGNAL TRANSMISSION METHOD AND SERIAL COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/764890 [patent_app_country] => US [patent_app_date] => 2024-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764890 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/764890
SYNCHRONIZATION SIGNAL TRANSMISSION METHOD AND SERIAL COMMUNICATION SYSTEM Jul 4, 2024 Pending
Array ( [id] => 19514303 [patent_doc_number] => 20240345989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => TRANSPARENT REMOTE MEMORY ACCESS OVER NETWORK PROTOCOL [patent_app_type] => utility [patent_app_number] => 18/755372 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/755372
TRANSPARENT REMOTE MEMORY ACCESS OVER NETWORK PROTOCOL Jun 25, 2024 Pending
Array ( [id] => 19482177 [patent_doc_number] => 20240330219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => ACCESS FOR COMPUTE NODES TO A STORAGE SERVER THROUGH A PCI EXPRESS FABRIC [patent_app_type] => utility [patent_app_number] => 18/740145 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740145
ACCESS FOR COMPUTE NODES TO A STORAGE SERVER THROUGH A PCI EXPRESS FABRIC Jun 10, 2024 Pending
Array ( [id] => 20408933 [patent_doc_number] => 20250378042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => SERIAL INTERFACE COMPRISING DUAL CLOCK AND DATA I/O CELL [patent_app_type] => utility [patent_app_number] => 18/740053 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740053 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740053
SERIAL INTERFACE COMPRISING DUAL CLOCK AND DATA I/O CELL Jun 10, 2024 Pending
Array ( [id] => 20395467 [patent_doc_number] => 20250370942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => APPLICATION OFFLOAD ACCELERATOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/680928 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680928
APPLICATION OFFLOAD ACCELERATOR DEVICE May 30, 2024 Pending
Array ( [id] => 19617568 [patent_doc_number] => 20240403248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => A/D CONVERTER CONTROL CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/678795 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678795
A/D CONVERTER CONTROL CIRCUIT May 29, 2024 Pending
Array ( [id] => 19405776 [patent_doc_number] => 20240289287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Optimizing Portioned Storage Data Delivery [patent_app_type] => utility [patent_app_number] => 18/650806 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/650806
Optimizing portioned storage data delivery Apr 29, 2024 Issued
Array ( [id] => 19362929 [patent_doc_number] => 20240264963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Scatter and Gather Streaming Data through a Circular FIFO [patent_app_type] => utility [patent_app_number] => 18/637305 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637305 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637305
Scatter and Gather Streaming Data through a Circular FIFO Apr 15, 2024 Pending
Array ( [id] => 20281947 [patent_doc_number] => 20250307189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => METHOD AND APPARATUS FOR CACHE TIERING [patent_app_type] => utility [patent_app_number] => 18/619508 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619508 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619508
METHOD AND APPARATUS FOR CACHE TIERING Mar 27, 2024 Pending
Array ( [id] => 19451191 [patent_doc_number] => 20240311321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MULTI-CORE SYSTEM AND READING METHOD [patent_app_type] => utility [patent_app_number] => 18/437924 [patent_app_country] => US [patent_app_date] => 2024-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/437924
MULTI-CORE SYSTEM AND READING METHOD Feb 8, 2024 Pending
Array ( [id] => 19334432 [patent_doc_number] => 20240248862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR HARDWARE CONTROL OF PROCESSOR PERFORMANCE LEVELS [patent_app_type] => utility [patent_app_number] => 18/424010 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424010
APPARATUSES, METHODS, AND SYSTEMS FOR HARDWARE CONTROL OF PROCESSOR PERFORMANCE LEVELS Jan 25, 2024 Issued
Array ( [id] => 19334439 [patent_doc_number] => 20240248869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => METHOD AND APPARATUS WITH PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) DATA TRANSMISSION [patent_app_type] => utility [patent_app_number] => 18/416093 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416093 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416093
METHOD AND APPARATUS WITH PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) DATA TRANSMISSION Jan 17, 2024 Pending
Array ( [id] => 19686433 [patent_doc_number] => 20250004978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => DEVICE FOR MONITORING INTER-INTEGRATED CIRCUIT BUS [patent_app_type] => utility [patent_app_number] => 18/537242 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537242
DEVICE FOR MONITORING INTER-INTEGRATED CIRCUIT BUS Dec 11, 2023 Pending
Array ( [id] => 20043323 [patent_doc_number] => 20250181545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => Serial Peripheral Interface Control Method [patent_app_type] => utility [patent_app_number] => 18/527837 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527837 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527837
Serial Peripheral Interface Control Method Dec 3, 2023 Pending
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