
Christopher A. Bartels
Examiner (ID: 4475, Phone: (571)270-3182 , Office: P/2184 )
| Most Active Art Unit | 2184 |
| Art Unit(s) | 2184 |
| Total Applications | 588 |
| Issued Applications | 356 |
| Pending Applications | 62 |
| Abandoned Applications | 186 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16164115
[patent_doc_number] => 20200220290
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-09
[patent_title] => ELECTRONIC DEVICE AND HOST THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/735142
[patent_app_country] => US
[patent_app_date] => 2020-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2690
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735142
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/735142 | ELECTRONIC DEVICE AND HOST THEREOF | Jan 5, 2020 | Abandoned |
Array
(
[id] => 16810516
[patent_doc_number] => 20210133071
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-06
[patent_title] => SIGNAL TUNING METHOD FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS AND COMPUTER SYSTEM USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/732363
[patent_app_country] => US
[patent_app_date] => 2020-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2402
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732363
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/732363 | Signal tuning method for peripheral component interconnect express and computer system using the same | Jan 1, 2020 | Issued |
Array
(
[id] => 17557977
[patent_doc_number] => 11314682
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-26
[patent_title] => Switchable I2S interface
[patent_app_type] => utility
[patent_app_number] => 16/729044
[patent_app_country] => US
[patent_app_date] => 2019-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3068
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729044
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/729044 | Switchable I2S interface | Dec 26, 2019 | Issued |
Array
(
[id] => 15870891
[patent_doc_number] => 20200142849
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => NAND SWITCH
[patent_app_type] => utility
[patent_app_number] => 16/726763
[patent_app_country] => US
[patent_app_date] => 2019-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7207
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726763
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/726763 | NAND switch | Dec 23, 2019 | Issued |
Array
(
[id] => 16780278
[patent_doc_number] => 20210117357
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => VIRTUAL MULTICHANNEL STORAGE CONTROL
[patent_app_type] => utility
[patent_app_number] => 16/658269
[patent_app_country] => US
[patent_app_date] => 2019-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7516
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658269
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/658269 | VIRTUAL MULTICHANNEL STORAGE CONTROL | Oct 20, 2019 | Abandoned |
Array
(
[id] => 15804765
[patent_doc_number] => 20200125525
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-23
[patent_title] => NONVOLATILE LOGIC MEMORY FOR COMPUTING MODULE RECONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 16/658928
[patent_app_country] => US
[patent_app_date] => 2019-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3031
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658928
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/658928 | Nonvolatile logic memory for computing module reconfiguration | Oct 20, 2019 | Issued |
Array
(
[id] => 15804755
[patent_doc_number] => 20200125520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-23
[patent_title] => Methods and Systems for Assigning Addresses to Devices That Use Master / Slave Communication Protocols
[patent_app_type] => utility
[patent_app_number] => 16/591343
[patent_app_country] => US
[patent_app_date] => 2019-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2941
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16591343
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/591343 | Methods and Systems for Assigning Addresses to Devices That Use Master / Slave Communication Protocols | Oct 1, 2019 | Abandoned |
Array
(
[id] => 16426151
[patent_doc_number] => 20200351349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => SYSTEM AND METHOD FOR COMMUNICATION BETWEEN BMSs
[patent_app_type] => utility
[patent_app_number] => 16/763075
[patent_app_country] => US
[patent_app_date] => 2019-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6375
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16763075
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/763075 | System and method for communication between BMSs | Sep 24, 2019 | Issued |
Array
(
[id] => 15622913
[patent_doc_number] => 20200081861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => HIGH SPEED INTERFACE CONNECTION APPARATUS AND METHOD
[patent_app_type] => utility
[patent_app_number] => 16/568505
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3027
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568505
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568505 | HIGH SPEED INTERFACE CONNECTION APPARATUS AND METHOD | Sep 11, 2019 | Abandoned |
Array
(
[id] => 15594611
[patent_doc_number] => 20200073840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-05
[patent_title] => DYNAMICALLY CHANGING CONFIGURATION OF DATA PROCESSING UNIT WHEN CONNECTED TO STORAGE DEVICE OR COMPUTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/560948
[patent_app_country] => US
[patent_app_date] => 2019-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12581
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560948
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/560948 | Dynamically changing configuration of data processing unit when connected to storage device or computing device | Sep 3, 2019 | Issued |
Array
(
[id] => 17802134
[patent_doc_number] => 11416435
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-16
[patent_title] => Flexible datapath offload chaining
[patent_app_type] => utility
[patent_app_number] => 16/559381
[patent_app_country] => US
[patent_app_date] => 2019-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 8898
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 303
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559381
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/559381 | Flexible datapath offload chaining | Sep 2, 2019 | Issued |
Array
(
[id] => 15271995
[patent_doc_number] => 20190384732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => METHOD, APPARATUS AND SYSTEM FOR CHANGING TO WHICH REMOTE DEVICE A LOCAL DEVICE IS IN COMMUNICATION VIA A COMMUNICATION MEDIUM THROUGH USE OF INTERRUPTION OF THE COMMUNICATION MEDIUM
[patent_app_type] => utility
[patent_app_number] => 16/554787
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4976
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554787
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/554787 | Method, apparatus and system for changing to which remote device a local device is in communication via a communication medium through use of interruption of the communication medium | Aug 28, 2019 | Issued |
Array
(
[id] => 16623602
[patent_doc_number] => 20210042255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-11
[patent_title] => Methods for Using High-Speed Data Communication Fabric to Enable Cross-System Command Buffer Writing for Data Retrieval in Cloud Gaming
[patent_app_type] => utility
[patent_app_number] => 16/556046
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26446
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556046
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/556046 | Methods for Using High-Speed Data Communication Fabric to Enable Cross-System Command Buffer Writing for Data Retrieval in Cloud Gaming | Aug 28, 2019 | Abandoned |
Array
(
[id] => 15271997
[patent_doc_number] => 20190384733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => Enabling Sync Header Suppression Latency Optimization In The Presence Of Retimers For Serial Interconnect
[patent_app_type] => utility
[patent_app_number] => 16/554974
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554974
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/554974 | Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect | Aug 28, 2019 | Issued |
Array
(
[id] => 17715407
[patent_doc_number] => 11379398
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Virtual ports for connecting core independent peripherals
[patent_app_type] => utility
[patent_app_number] => 16/550648
[patent_app_country] => US
[patent_app_date] => 2019-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 7371
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550648
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/550648 | Virtual ports for connecting core independent peripherals | Aug 25, 2019 | Issued |
Array
(
[id] => 15602001
[patent_doc_number] => 20200077535
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-05
[patent_title] => REMOVABLE I/O EXPANSION DEVICE FOR DATA CENTER STORAGE RACK
[patent_app_type] => utility
[patent_app_number] => 16/546185
[patent_app_country] => US
[patent_app_date] => 2019-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546185
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/546185 | REMOVABLE I/O EXPANSION DEVICE FOR DATA CENTER STORAGE RACK | Aug 19, 2019 | Abandoned |
Array
(
[id] => 16636972
[patent_doc_number] => 10915482
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-09
[patent_title] => Aligning received bad data indicators (BDIS) with received data on a cross-chip link
[patent_app_type] => utility
[patent_app_number] => 16/536883
[patent_app_country] => US
[patent_app_date] => 2019-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6625
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16536883
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/536883 | Aligning received bad data indicators (BDIS) with received data on a cross-chip link | Aug 8, 2019 | Issued |
Array
(
[id] => 17829469
[patent_doc_number] => 20220266773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-25
[patent_title] => CONTROL APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/625229
[patent_app_country] => US
[patent_app_date] => 2019-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4261
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17625229
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/625229 | CONTROL APPARATUS | Jul 8, 2019 | Pending |
Array
(
[id] => 15297609
[patent_doc_number] => 20190391940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-26
[patent_title] => TECHNOLOGIES FOR INTERRUPT DISASSOCIATED QUEUING FOR MULTI-QUEUE I/O DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/457110
[patent_app_country] => US
[patent_app_date] => 2019-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8508
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457110
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/457110 | TECHNOLOGIES FOR INTERRUPT DISASSOCIATED QUEUING FOR MULTI-QUEUE I/O DEVICES | Jun 27, 2019 | Abandoned |
Array
(
[id] => 14997905
[patent_doc_number] => 20190317910
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-17
[patent_title] => PROCESSING OF EVENTS FOR ACCELERATORS UTILIZED FOR PARALLEL PROCESSING
[patent_app_type] => utility
[patent_app_number] => 16/451748
[patent_app_country] => US
[patent_app_date] => 2019-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7006
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16451748
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/451748 | Processing of events for accelerators utilized for parallel processing | Jun 24, 2019 | Issued |