
Christopher A. Culbert
Examiner (ID: 17378, Phone: (571)272-4893 , Office: P/2815 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 447 |
| Issued Applications | 142 |
| Pending Applications | 122 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16067803
[patent_doc_number] => 10692866
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages
[patent_app_type] => utility
[patent_app_number] => 16/036067
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 25
[patent_no_of_words] => 10314
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036067
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036067 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Jul 15, 2018 | Issued |
Array
(
[id] => 14285391
[patent_doc_number] => 20190139980
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DETECTING ELECTRICAL FAILURE THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/036000
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6645
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036000
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036000 | Three-dimensional semiconductor memory device and method of detecting electrical failure thereof | Jul 15, 2018 | Issued |
Array
(
[id] => 13936675
[patent_doc_number] => 20190051853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE HAVING THE LIGHT-EMITTING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/021688
[patent_app_country] => US
[patent_app_date] => 2018-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8564
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16021688
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/021688 | LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE HAVING THE LIGHT-EMITTING ELEMENT | Jun 27, 2018 | Abandoned |
Array
(
[id] => 13785353
[patent_doc_number] => 20190006215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-03
[patent_title] => LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS, AND HEAT TREATMENT METHOD
[patent_app_type] => utility
[patent_app_number] => 16/017177
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19621
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 351
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017177
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/017177 | LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS, AND HEAT TREATMENT METHOD | Jun 24, 2018 | Abandoned |
Array
(
[id] => 16649131
[patent_doc_number] => 10926288
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-23
[patent_title] => Coating method, coating apparatus and recording medium
[patent_app_type] => utility
[patent_app_number] => 16/016786
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 12344
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 320
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016786
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/016786 | Coating method, coating apparatus and recording medium | Jun 24, 2018 | Issued |
Array
(
[id] => 17289148
[patent_doc_number] => 11205709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-21
[patent_title] => Defect filling in patterned layer
[patent_app_type] => utility
[patent_app_number] => 16/017153
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 24
[patent_no_of_words] => 6813
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017153
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/017153 | Defect filling in patterned layer | Jun 24, 2018 | Issued |
Array
(
[id] => 13500169
[patent_doc_number] => 20180301627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-18
[patent_title] => MATERIALS AND COMPONENTS IN PHASE CHANGE MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/017663
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6254
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017663
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/017663 | MATERIALS AND COMPONENTS IN PHASE CHANGE MEMORY DEVICES | Jun 24, 2018 | Abandoned |
Array
(
[id] => 17239232
[patent_doc_number] => 11183115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Active matrix OLED display with normally-on thin-film transistors
[patent_app_type] => utility
[patent_app_number] => 16/016065
[patent_app_country] => US
[patent_app_date] => 2018-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 6116
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016065
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/016065 | Active matrix OLED display with normally-on thin-film transistors | Jun 21, 2018 | Issued |
Array
(
[id] => 16631858
[patent_doc_number] => 20210050512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => PHASE CHANGE MEMORY STRUCTURES AND DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/041882
[patent_app_country] => US
[patent_app_date] => 2018-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11253
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17041882
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/041882 | PHASE CHANGE MEMORY STRUCTURES AND DEVICES | May 30, 2018 | Abandoned |
Array
(
[id] => 13528613
[patent_doc_number] => 20180315849
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-01
[patent_title] => Integrated High Side Gate Driver Structure and Circuit for Driving High Side Power Transistors
[patent_app_type] => utility
[patent_app_number] => 15/981748
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6874
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981748
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981748 | Integrated High Side Gate Driver Structure and Circuit for Driving High Side Power Transistors | May 15, 2018 | Abandoned |
Array
(
[id] => 15461931
[patent_doc_number] => 20200043790
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-06
[patent_title] => SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES VIA REMOTE EPITAXY
[patent_app_type] => utility
[patent_app_number] => 16/605897
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6299
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16605897
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/605897 | SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES VIA REMOTE EPITAXY | Apr 17, 2018 | Abandoned |
Array
(
[id] => 16601868
[patent_doc_number] => 20210028399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/043579
[patent_app_country] => US
[patent_app_date] => 2018-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8369
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17043579
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/043579 | DISPLAY DEVICE | Mar 29, 2018 | Abandoned |
Array
(
[id] => 16226343
[patent_doc_number] => 20200251460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => MICRO-LED ELEMENT, IMAGE DISPLAY ELEMENT, AND PRODUCTION METHOD
[patent_app_type] => utility
[patent_app_number] => 16/641907
[patent_app_country] => US
[patent_app_date] => 2018-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19043
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16641907
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/641907 | MICRO-LED ELEMENT, IMAGE DISPLAY ELEMENT, AND PRODUCTION METHOD | Mar 5, 2018 | Abandoned |
Array
(
[id] => 12801340
[patent_doc_number] => 20180158949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-07
[patent_title] => SPACER FORMATION IN VERTICAL FIELD EFFECT TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 15/900827
[patent_app_country] => US
[patent_app_date] => 2018-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8080
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900827
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/900827 | SPACER FORMATION IN VERTICAL FIELD EFFECT TRANSISTORS | Feb 20, 2018 | Abandoned |
Array
(
[id] => 12849598
[patent_doc_number] => 20180175039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-21
[patent_title] => Conductive Structures, Wordlines and Transistors
[patent_app_type] => utility
[patent_app_number] => 15/895587
[patent_app_country] => US
[patent_app_date] => 2018-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3155
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15895587
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/895587 | Conductive structures, wordlines and transistors | Feb 12, 2018 | Issued |
Array
(
[id] => 12849208
[patent_doc_number] => 20180174909
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-21
[patent_title] => HYBRID INTEGRATED SEMICONDUCTOR TRI-GATE AND SPLIT DUAL-GATE FINFET DEVICES AND METHOD FOR MANUFACTURING
[patent_app_type] => utility
[patent_app_number] => 15/885564
[patent_app_country] => US
[patent_app_date] => 2018-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6823
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15885564
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/885564 | Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing | Jan 30, 2018 | Issued |
Array
(
[id] => 14738859
[patent_doc_number] => 10388841
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Light emitting package
[patent_app_type] => utility
[patent_app_number] => 15/863146
[patent_app_country] => US
[patent_app_date] => 2018-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 7297
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15863146
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/863146 | Light emitting package | Jan 4, 2018 | Issued |
Array
(
[id] => 13335231
[patent_doc_number] => 20180219153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-02
[patent_title] => Semiconductor Constructions, Methods of Forming Memory, and Methods of Forming Vertically-Stacked Structures
[patent_app_type] => utility
[patent_app_number] => 15/857422
[patent_app_country] => US
[patent_app_date] => 2017-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5499
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857422
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/857422 | Semiconductor constructions | Dec 27, 2017 | Issued |
Array
(
[id] => 12554367
[patent_doc_number] => 10014347
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-03
[patent_title] => Arrays of memory cells and methods of forming an array of memory cells
[patent_app_type] => utility
[patent_app_number] => 15/852275
[patent_app_country] => US
[patent_app_date] => 2017-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 27
[patent_no_of_words] => 5817
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852275
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/852275 | Arrays of memory cells and methods of forming an array of memory cells | Dec 21, 2017 | Issued |
Array
(
[id] => 16348278
[patent_doc_number] => 20200312929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-01
[patent_title] => ORGANIC ELECTROLUMINESCENCE LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/311821
[patent_app_country] => US
[patent_app_date] => 2017-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11416
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16311821
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/311821 | ORGANIC ELECTROLUMINESCENCE LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD THEREOF | Nov 27, 2017 | Abandoned |