Search

Christopher A. Culbert

Examiner (ID: 19187, Phone: (571)272-4893 , Office: P/2815 )

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
449
Issued Applications
148
Pending Applications
111
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11253115 [patent_doc_number] => 09478629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Conductivity modulation in a silicon carbide bipolar junction transistor' [patent_app_type] => utility [patent_app_number] => 13/739815 [patent_app_country] => US [patent_app_date] => 2013-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 10762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13739815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/739815
Conductivity modulation in a silicon carbide bipolar junction transistor Jan 10, 2013 Issued
Array ( [id] => 8901230 [patent_doc_number] => 20130168733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'SEMICONDUCTOR-STACKED SUBSTRATE, SEMICONDUCTOR CHIP, AND METHOD FOR PRODUCING SEMICONDUCTOR-STACKED SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/739867 [patent_app_country] => US [patent_app_date] => 2013-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13261 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13739867 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/739867
SEMICONDUCTOR-STACKED SUBSTRATE, SEMICONDUCTOR CHIP, AND METHOD FOR PRODUCING SEMICONDUCTOR-STACKED SUBSTRATE Jan 10, 2013 Abandoned
Array ( [id] => 12250096 [patent_doc_number] => 09922878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing' [patent_app_type] => utility [patent_app_number] => 13/711586 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 7172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711586 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711586
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Dec 10, 2012 Issued
Array ( [id] => 8904311 [patent_doc_number] => 20130171814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/668815 [patent_app_country] => US [patent_app_date] => 2012-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 9832 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13668815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/668815
Method of manufacturing semiconductor device Nov 4, 2012 Issued
Array ( [id] => 9449547 [patent_doc_number] => 20140120717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'Method of Semiconductor Integrated Circuit Fabrication' [patent_app_type] => utility [patent_app_number] => 13/666694 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13666694 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/666694
Method of Semiconductor Integrated Circuit Fabrication Oct 31, 2012 Abandoned
Array ( [id] => 8904246 [patent_doc_number] => 20130171749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'PACKAGE METHOD FOR ELECTRONIC COMPONENTS BY THIN SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/665947 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10198 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665947 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/665947
PACKAGE METHOD FOR ELECTRONIC COMPONENTS BY THIN SUBSTRATE Oct 31, 2012 Abandoned
Array ( [id] => 8821574 [patent_doc_number] => 20130122619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'OPTICAL DEVICE WAFER PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 13/666417 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5924 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13666417 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/666417
OPTICAL DEVICE WAFER PROCESSING METHOD Oct 31, 2012 Abandoned
Array ( [id] => 9449559 [patent_doc_number] => 20140120729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'METHOD FOR REMOVING A PATTERNED HARD MASK LAYER' [patent_app_type] => utility [patent_app_number] => 13/666268 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5798 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13666268 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/666268
METHOD FOR REMOVING A PATTERNED HARD MASK LAYER Oct 31, 2012 Abandoned
Array ( [id] => 9552130 [patent_doc_number] => 08759178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Method for manufacturing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/666445 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 6496 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13666445 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/666445
Method for manufacturing semiconductor device and semiconductor device Oct 31, 2012 Issued
Array ( [id] => 8603942 [patent_doc_number] => 20130009254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'Electrical Device and Fabrication Method' [patent_app_type] => utility [patent_app_number] => 13/620955 [patent_app_country] => US [patent_app_date] => 2012-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11227 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620955
Electrical device and fabrication method Sep 14, 2012 Issued
Array ( [id] => 8733208 [patent_doc_number] => 20130078777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'METHOD FOR FABRICATING JUNCTIONLESS TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/618054 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4681 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13618054 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/618054
METHOD FOR FABRICATING JUNCTIONLESS TRANSISTOR Sep 13, 2012 Abandoned
Array ( [id] => 9031586 [patent_doc_number] => 20130234224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 13/590586 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590586 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590586
SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD FOR THE SAME Aug 20, 2012 Abandoned
Array ( [id] => 11898116 [patent_doc_number] => 09768055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Isolation regions for SOI devices' [patent_app_type] => utility [patent_app_number] => 13/590836 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2361 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590836 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590836
Isolation regions for SOI devices Aug 20, 2012 Issued
Array ( [id] => 9220265 [patent_doc_number] => 20140015040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/589199 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 3245 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589199 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589199
POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF Aug 19, 2012 Abandoned
Array ( [id] => 9316529 [patent_doc_number] => 20140048867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'MULTI-TIME PROGRAMMABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/589176 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589176 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589176
MULTI-TIME PROGRAMMABLE MEMORY Aug 19, 2012 Abandoned
Array ( [id] => 9220167 [patent_doc_number] => 20140014942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'THIN-FILM TRANSISTOR, ELECTRONIC CIRCUIT, DISPLAY AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/548133 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6459 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548133 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/548133
THIN-FILM TRANSISTOR, ELECTRONIC CIRCUIT, DISPLAY AND METHOD OF MANUFACTURING THE SAME Jul 11, 2012 Abandoned
Array ( [id] => 9000347 [patent_doc_number] => 20130221471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'BACKSIDE ILLUMINATED IMAGE-SENSOR AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/547211 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2671 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547211 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547211
BACKSIDE ILLUMINATED IMAGE-SENSOR AND METHOD FOR MANUFACTURING THE SAME Jul 11, 2012 Abandoned
Array ( [id] => 8850841 [patent_doc_number] => 20130140517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'Thin and Flexible Gallium Nitride and Method of Making the Same' [patent_app_type] => utility [patent_app_number] => 13/538590 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7169 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538590 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538590
Thin and Flexible Gallium Nitride and Method of Making the Same Jun 28, 2012 Abandoned
Array ( [id] => 8838923 [patent_doc_number] => 20130134551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'INDUCTORS IN SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/538388 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538388
INDUCTORS IN SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME Jun 28, 2012 Abandoned
Array ( [id] => 16896361 [patent_doc_number] => 11037923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Through gate fin isolation [patent_app_type] => utility [patent_app_number] => 13/538935 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 8199 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538935 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538935
Through gate fin isolation Jun 28, 2012 Issued
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