Search

Christopher A. Flory

Examiner (ID: 408, Phone: (571)270-5305 , Office: P/3762 )

Most Active Art Unit
3762
Art Unit(s)
3762, 3792
Total Applications
796
Issued Applications
569
Pending Applications
18
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11524254 [patent_doc_number] => 09607663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Non-volatile dynamic random access memory (NVDRAM) with programming line' [patent_app_type] => utility [patent_app_number] => 14/823698 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4330 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823698 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823698
Non-volatile dynamic random access memory (NVDRAM) with programming line Aug 10, 2015 Issued
Array ( [id] => 11200880 [patent_doc_number] => 09431098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-30 [patent_title] => 'Structure for reducing pre-charge voltage for static random-access memory arrays' [patent_app_type] => utility [patent_app_number] => 14/822089 [patent_app_country] => US [patent_app_date] => 2015-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8947 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14822089 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/822089
Structure for reducing pre-charge voltage for static random-access memory arrays Aug 9, 2015 Issued
Array ( [id] => 10696650 [patent_doc_number] => 20160042798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND READING METHOD' [patent_app_type] => utility [patent_app_number] => 14/820289 [patent_app_country] => US [patent_app_date] => 2015-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9818 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14820289 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/820289
Non-volatile semiconductor memory device and reading method for non-volatile semiconductor memory device that includes charging of data latch input node prior to latching of sensed data Aug 5, 2015 Issued
Array ( [id] => 11524277 [patent_doc_number] => 09607685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Memory array with strap cells' [patent_app_type] => utility [patent_app_number] => 14/813185 [patent_app_country] => US [patent_app_date] => 2015-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813185 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/813185
Memory array with strap cells Jul 29, 2015 Issued
Array ( [id] => 10689290 [patent_doc_number] => 20160035435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'MEMORY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/809379 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16476 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14809379 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/809379
Memory circuit that updates and holds output signal based on fuse signal Jul 26, 2015 Issued
Array ( [id] => 10624195 [patent_doc_number] => 09343144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Memory device and method of controlling memory device' [patent_app_type] => utility [patent_app_number] => 14/810074 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 56 [patent_no_of_words] => 15368 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810074
Memory device and method of controlling memory device Jul 26, 2015 Issued
Array ( [id] => 16987980 [patent_doc_number] => 11075163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Vertical NAND string multiple data line memory [patent_app_type] => utility [patent_app_number] => 14/810044 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810044 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810044
Vertical NAND string multiple data line memory Jul 26, 2015 Issued
Array ( [id] => 10730973 [patent_doc_number] => 20160077123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'STATE DETERMINATION DEVICE AND STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 14/801021 [patent_app_country] => US [patent_app_date] => 2015-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6944 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14801021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/801021
STATE DETERMINATION DEVICE AND STORAGE MEDIUM Jul 15, 2015 Abandoned
Array ( [id] => 11360735 [patent_doc_number] => 09537398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => 'Voltage generating circuit and regulator circuit for precisely control predetermined high voltage' [patent_app_type] => utility [patent_app_number] => 14/798477 [patent_app_country] => US [patent_app_date] => 2015-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 9954 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798477 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/798477
Voltage generating circuit and regulator circuit for precisely control predetermined high voltage Jul 13, 2015 Issued
Array ( [id] => 12101899 [patent_doc_number] => 09858997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Electronic apparatus applying unified non-volatile memory and unified non-volatile memory controlling method' [patent_app_type] => utility [patent_app_number] => 14/798471 [patent_app_country] => US [patent_app_date] => 2015-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3493 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14798471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/798471
Electronic apparatus applying unified non-volatile memory and unified non-volatile memory controlling method Jul 13, 2015 Issued
Array ( [id] => 11036019 [patent_doc_number] => 20160232975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND PROGRAMMING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/792853 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8381 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792853 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792853
SEMICONDUCTOR MEMORY DEVICE AND PROGRAMMING METHOD OF THE SAME Jul 6, 2015 Abandoned
Array ( [id] => 12012448 [patent_doc_number] => 09805768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Three-dimensional (3D) non-volatile semiconductor memory device for loading improvement' [patent_app_type] => utility [patent_app_number] => 14/752444 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2636 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14752444 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/752444
Three-dimensional (3D) non-volatile semiconductor memory device for loading improvement Jun 25, 2015 Issued
Array ( [id] => 11770113 [patent_doc_number] => 09378797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Provide a memory device capable of increasing performance by performing a write operation using stable multi voltages that are applied to a word line' [patent_app_type] => utility [patent_app_number] => 14/751112 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 21821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14751112 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/751112
Provide a memory device capable of increasing performance by performing a write operation using stable multi voltages that are applied to a word line Jun 24, 2015 Issued
Array ( [id] => 10695049 [patent_doc_number] => 20160041195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'ELECTRONIC DEVICE AND MOVEMENT JUDGMENT METHOD' [patent_app_type] => utility [patent_app_number] => 14/749388 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9610 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/749388
ELECTRONIC DEVICE AND MOVEMENT JUDGMENT METHOD Jun 23, 2015 Abandoned
Array ( [id] => 13681933 [patent_doc_number] => 20160379703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => CIRCUIT FOR READING FERROELECTRIC MEMORY [patent_app_type] => utility [patent_app_number] => 14/747679 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747679 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747679
Memory circuit for reading ferroeletric memory having gain element including feedback capacitor Jun 22, 2015 Issued
Array ( [id] => 11326192 [patent_doc_number] => 20160356804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'Pedestrian Velocity Estimation' [patent_app_type] => utility [patent_app_number] => 14/732470 [patent_app_country] => US [patent_app_date] => 2015-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732470 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/732470
Pedestrian velocity estimation Jun 4, 2015 Issued
Array ( [id] => 15060189 [patent_doc_number] => 10460403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => System and method to reduce human activity damage-induced power outage [patent_app_type] => utility [patent_app_number] => 14/730234 [patent_app_country] => US [patent_app_date] => 2015-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 9432 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730234 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/730234
System and method to reduce human activity damage-induced power outage Jun 3, 2015 Issued
Array ( [id] => 11214523 [patent_doc_number] => 09443561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-13 [patent_title] => 'Ring networks for intra- and inter-memory I/O including 3D-stacked memories' [patent_app_type] => utility [patent_app_number] => 14/719200 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14719200 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/719200
Ring networks for intra- and inter-memory I/O including 3D-stacked memories May 20, 2015 Issued
Array ( [id] => 11589831 [patent_doc_number] => 20170114241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-27 [patent_title] => 'PROCESSING OF THIN FILM ORGANIC FERROELECTRIC MATERIALS USING PULSED ELECTROMAGNETIC RADIATION' [patent_app_type] => utility [patent_app_number] => 15/315503 [patent_app_country] => US [patent_app_date] => 2015-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12339 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15315503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/315503
Processing of thin film organic ferroelectric materials using pulsed electromagnetic radiation May 18, 2015 Issued
Array ( [id] => 11020898 [patent_doc_number] => 20160217852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'MEMORY OPERATING METHOD AND ASSOCIATED MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/711867 [patent_app_country] => US [patent_app_date] => 2015-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3003 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14711867 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/711867
Memory operating method for increasing cell capacity based on resistance characteristic of memory and associated memory device May 13, 2015 Issued
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