Search

Christopher A. Flory

Examiner (ID: 408, Phone: (571)270-5305 , Office: P/3762 )

Most Active Art Unit
3762
Art Unit(s)
3762, 3792
Total Applications
796
Issued Applications
569
Pending Applications
18
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9640899 [patent_doc_number] => 20140219010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/245124 [patent_app_country] => US [patent_app_date] => 2014-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10094 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14245124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/245124
Semiconductor device with logic circuit, SRAM circuit and standby state Apr 3, 2014 Issued
Array ( [id] => 9755375 [patent_doc_number] => 20140286076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/217793 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 24380 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14217793 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/217793
Semiconductor device having Schmitt trigger NAND circuit and Schmitt trigger inverter Mar 17, 2014 Issued
Array ( [id] => 10171864 [patent_doc_number] => 09202576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Non-volatile memory device and programming method using fewer verification voltages than programmable data states' [patent_app_type] => utility [patent_app_number] => 14/211077 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11525 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14211077 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/211077
Non-volatile memory device and programming method using fewer verification voltages than programmable data states Mar 13, 2014 Issued
Array ( [id] => 9915787 [patent_doc_number] => 20150070993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/208473 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208473 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208473
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Mar 12, 2014 Abandoned
Array ( [id] => 10112027 [patent_doc_number] => 09147445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Semiconductor device including a charge controller, a delay unit and a discharger' [patent_app_type] => utility [patent_app_number] => 14/193157 [patent_app_country] => US [patent_app_date] => 2014-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3191 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14193157 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/193157
Semiconductor device including a charge controller, a delay unit and a discharger Feb 27, 2014 Issued
Array ( [id] => 9559626 [patent_doc_number] => 20140177338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'NON-VOLATILE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/190116 [patent_app_country] => US [patent_app_date] => 2014-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7800 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14190116 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/190116
Non-volatile memory cell Feb 25, 2014 Issued
Array ( [id] => 9929910 [patent_doc_number] => 20150078102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA TRANSMISSION METHOD' [patent_app_type] => utility [patent_app_number] => 14/188261 [patent_app_country] => US [patent_app_date] => 2014-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14188261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/188261
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA TRANSMISSION METHOD Feb 23, 2014 Abandoned
Array ( [id] => 9733430 [patent_doc_number] => 20140269139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'HIDDEN REFRESH OF WEAK MEMORY STORAGE CELLS IN SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 14/175857 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11002 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/175857
Hidden refresh of weak memory storage cells in semiconductor memory Feb 6, 2014 Issued
Array ( [id] => 9991185 [patent_doc_number] => 09036401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'Memory cell operation' [patent_app_type] => utility [patent_app_number] => 14/171243 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5668 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171243 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/171243
Memory cell operation Feb 2, 2014 Issued
Array ( [id] => 14060009 [patent_doc_number] => 10234293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Inertial device including an acceleration, method performed by the same, and program [patent_app_type] => utility [patent_app_number] => 14/763184 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10340 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14763184 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/763184
Inertial device including an acceleration, method performed by the same, and program Jan 27, 2014 Issued
Array ( [id] => 13067333 [patent_doc_number] => 10054442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Method and apparatus for handling vertical orientations of devices for constraint free portable navigation [patent_app_type] => utility [patent_app_number] => 14/760973 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6614 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14760973 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/760973
Method and apparatus for handling vertical orientations of devices for constraint free portable navigation Jan 16, 2014 Issued
Array ( [id] => 10455076 [patent_doc_number] => 20150340091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'EXPLOITING PCM WRITE ASYMMETRIES TO ACCELERATE WRITE' [patent_app_type] => utility [patent_app_number] => 14/759085 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11015 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14759085 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/759085
Exploiting phase-change memory write asymmetries to accelerate write Dec 19, 2013 Issued
Array ( [id] => 9382510 [patent_doc_number] => 20140085991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/094438 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 12326 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094438 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094438
Nonvolatile semiconductor memory device Dec 1, 2013 Issued
Array ( [id] => 9372509 [patent_doc_number] => 20140082382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'METHOD AND SYSTEM FOR PROVIDING BACKUP POWER FOR MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/088546 [patent_app_country] => US [patent_app_date] => 2013-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4075 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14088546 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/088546
METHOD AND SYSTEM FOR PROVIDING BACKUP POWER FOR MEMORY DEVICES Nov 24, 2013 Abandoned
Array ( [id] => 10253867 [patent_doc_number] => 20150138863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'INTERLEAVED WRITE ASSIST FOR HIERARCHICAL BITLINE SRAM ARCHITECTURES' [patent_app_type] => utility [patent_app_number] => 14/086171 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3357 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086171
INTERLEAVED WRITE ASSIST FOR HIERARCHICAL BITLINE SRAM ARCHITECTURES Nov 20, 2013 Abandoned
Array ( [id] => 11599497 [patent_doc_number] => 09646673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Address detection circuit, memory system including the same' [patent_app_type] => utility [patent_app_number] => 14/085531 [patent_app_country] => US [patent_app_date] => 2013-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14997 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14085531 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/085531
Address detection circuit, memory system including the same Nov 19, 2013 Issued
Array ( [id] => 11483080 [patent_doc_number] => 09589631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Ultrafast quench based nonvolatile bistable device' [patent_app_type] => utility [patent_app_number] => 14/648902 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3859 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14648902 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/648902
Ultrafast quench based nonvolatile bistable device Sep 29, 2013 Issued
Array ( [id] => 9203939 [patent_doc_number] => 20140003116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING HIERARCHICAL STRUCTURED BIT LINES' [patent_app_type] => utility [patent_app_number] => 14/019143 [patent_app_country] => US [patent_app_date] => 2013-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6535 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14019143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/019143
SEMICONDUCTOR DEVICE HAVING HIERARCHICAL STRUCTURED BIT LINES Sep 4, 2013 Abandoned
Array ( [id] => 9190189 [patent_doc_number] => 20130329504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'DELAY ADJUSTMENT DEVICE, SEMICONDUCTOR DEVICE AND DELAY ADJUSTMENT METHOD' [patent_app_type] => utility [patent_app_number] => 13/967540 [patent_app_country] => US [patent_app_date] => 2013-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7838 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967540 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/967540
DELAY ADJUSTMENT DEVICE, SEMICONDUCTOR DEVICE AND DELAY ADJUSTMENT METHOD Aug 14, 2013 Abandoned
Array ( [id] => 9176309 [patent_doc_number] => 20130318294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'INTERNAL PROCESSOR BUFFER' [patent_app_type] => utility [patent_app_number] => 13/960634 [patent_app_country] => US [patent_app_date] => 2013-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13960634 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/960634
Internal processor buffer Aug 5, 2013 Issued
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