Search

Christopher A. Flory

Examiner (ID: 408, Phone: (571)270-5305 , Office: P/3762 )

Most Active Art Unit
3762
Art Unit(s)
3762, 3792
Total Applications
796
Issued Applications
569
Pending Applications
18
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9173015 [patent_doc_number] => 20130315000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'Techniques For Providing A Direct Injection Semiconductor Memory Device' [patent_app_type] => utility [patent_app_number] => 13/954660 [patent_app_country] => US [patent_app_date] => 2013-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9346 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13954660 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/954660
Techniques for providing a direct injection semiconductor memory device Jul 29, 2013 Issued
Array ( [id] => 9583912 [patent_doc_number] => 08773917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Word line kicking when sensing non-volatile storage' [patent_app_type] => utility [patent_app_number] => 13/951228 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10606 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951228 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951228
Word line kicking when sensing non-volatile storage Jul 24, 2013 Issued
Array ( [id] => 9329303 [patent_doc_number] => 20140056085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'SEMICONDUCTOR CHIPS AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/944345 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4491 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944345 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944345
Semiconductor chips and semiconductor systems for executing a test mode Jul 16, 2013 Issued
Array ( [id] => 9669468 [patent_doc_number] => 20140233332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'SEMICONDUCTOR MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/941777 [patent_app_country] => US [patent_app_date] => 2013-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4094 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13941777 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/941777
SEMICONDUCTOR MEMORY SYSTEM Jul 14, 2013 Abandoned
Array ( [id] => 9133434 [patent_doc_number] => 20130294148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'RESISTIVE MEMORY SENSING METHODS AND DEVICES' [patent_app_type] => utility [patent_app_number] => 13/938052 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938052 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/938052
Resistive memory sensing methods and devices Jul 8, 2013 Issued
Array ( [id] => 9684304 [patent_doc_number] => 20140241068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/935761 [patent_app_country] => US [patent_app_date] => 2013-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4825 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13935761 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/935761
NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE Jul 4, 2013 Abandoned
Array ( [id] => 9791232 [patent_doc_number] => 20150003176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'MASTER/SLAVE CONTROL VOLTAGE BUFFERING' [patent_app_type] => utility [patent_app_number] => 13/929967 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3045 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929967
Master/slave control voltage buffering Jun 27, 2013 Issued
Array ( [id] => 10189451 [patent_doc_number] => 09218877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Differential bit cell' [patent_app_type] => utility [patent_app_number] => 13/924495 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924495
Differential bit cell Jun 20, 2013 Issued
Array ( [id] => 9583911 [patent_doc_number] => 08773916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Nonvolatile memory device, system and programming method with dynamic verification mode selection' [patent_app_type] => utility [patent_app_number] => 13/919010 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 19356 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919010 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919010
Nonvolatile memory device, system and programming method with dynamic verification mode selection Jun 16, 2013 Issued
Array ( [id] => 10966100 [patent_doc_number] => 20140369132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'DIFFERENTIAL CURRENT SENSE AMPLIFIER AND METHOD FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/918833 [patent_app_country] => US [patent_app_date] => 2013-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6807 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918833 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/918833
Differential current sense amplifier and method for non-volatile memory Jun 13, 2013 Issued
Array ( [id] => 9190165 [patent_doc_number] => 20130329480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'SRAM' [patent_app_type] => utility [patent_app_number] => 13/915623 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 23981 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915623 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915623
SRAM with via displacement Jun 10, 2013 Issued
Array ( [id] => 10871866 [patent_doc_number] => 08897078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Method, apparatus, and system for improved read operation in memory' [patent_app_type] => utility [patent_app_number] => 13/915255 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915255 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915255
Method, apparatus, and system for improved read operation in memory Jun 10, 2013 Issued
Array ( [id] => 9267939 [patent_doc_number] => 20140022855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'MULTI LEVEL ANTIFUSE MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/912649 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14211 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912649 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/912649
Multi level antifuse memory device and method of operating the same Jun 6, 2013 Issued
Array ( [id] => 9190169 [patent_doc_number] => 20130329484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE OF VARIABLE RESISTIVE TYPE' [patent_app_type] => utility [patent_app_number] => 13/909505 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909505 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909505
Nonvolatile semiconductor memory device of variable resistive type with reduced variations of forming current after breakdown Jun 3, 2013 Issued
Array ( [id] => 9567681 [patent_doc_number] => 20140185394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'Memory with Bit Cell Header Transistor' [patent_app_type] => utility [patent_app_number] => 13/902439 [patent_app_country] => US [patent_app_date] => 2013-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3595 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13902439 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/902439
Memory with bit cell header transistor May 23, 2013 Issued
Array ( [id] => 10617439 [patent_doc_number] => 09336885 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-10 [patent_title] => 'Reading and writing to NAND flash memories using charge constrained codes' [patent_app_type] => utility [patent_app_number] => 13/900861 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900861 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900861
Reading and writing to NAND flash memories using charge constrained codes May 22, 2013 Issued
Array ( [id] => 9261212 [patent_doc_number] => 20130343141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND ERASURE VERIFICATION METHOD FOR SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/895839 [patent_app_country] => US [patent_app_date] => 2013-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12986 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13895839 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/895839
Semiconductor memory device and erasure verification method for semiconductor memory device May 15, 2013 Issued
Array ( [id] => 9040030 [patent_doc_number] => 20130242668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'FLASH MEMORY DEVICE AND METHOD OF PROGRAMMING SAME' [patent_app_type] => utility [patent_app_number] => 13/891657 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8160 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891657 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/891657
Flash memory device and method of programming same May 9, 2013 Issued
Array ( [id] => 11300403 [patent_doc_number] => 09508414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Memory cell supply voltage reduction prior to write cycle' [patent_app_type] => utility [patent_app_number] => 13/874725 [patent_app_country] => US [patent_app_date] => 2013-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3745 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13874725 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/874725
Memory cell supply voltage reduction prior to write cycle Apr 30, 2013 Issued
Array ( [id] => 9324917 [patent_doc_number] => 08659947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/870164 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 12301 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870164 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870164
Nonvolatile semiconductor memory device Apr 24, 2013 Issued
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