Search

Christopher A. Flory

Examiner (ID: 408, Phone: (571)270-5305 , Office: P/3762 )

Most Active Art Unit
3762
Art Unit(s)
3762, 3792
Total Applications
796
Issued Applications
569
Pending Applications
18
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9939100 [patent_doc_number] => 08988920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/426443 [patent_app_country] => US [patent_app_date] => 2012-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2779 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13426443 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/426443
Semiconductor memory device Mar 20, 2012 Issued
Array ( [id] => 10852612 [patent_doc_number] => 08879307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Magnetoresistive device and nonvolatile memory with the same' [patent_app_type] => utility [patent_app_number] => 13/424769 [patent_app_country] => US [patent_app_date] => 2012-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 44 [patent_no_of_words] => 21808 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424769 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/424769
Magnetoresistive device and nonvolatile memory with the same Mar 19, 2012 Issued
Array ( [id] => 9979046 [patent_doc_number] => 09025369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-05 [patent_title] => 'Resistance change nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/424201 [patent_app_country] => US [patent_app_date] => 2012-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 47 [patent_no_of_words] => 9101 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424201 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/424201
Resistance change nonvolatile semiconductor memory device Mar 18, 2012 Issued
Array ( [id] => 10871859 [patent_doc_number] => 08897071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Memory device biasing method and apparatus' [patent_app_type] => utility [patent_app_number] => 13/417475 [patent_app_country] => US [patent_app_date] => 2012-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6266 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13417475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/417475
Memory device biasing method and apparatus Mar 11, 2012 Issued
Array ( [id] => 8263674 [patent_doc_number] => 20120163104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'DELAY ADJUSTMENT DEVICE, SEMICONDUCTOR DEVICE AND DELAY ADJUSTMENT METHOD' [patent_app_type] => utility [patent_app_number] => 13/413522 [patent_app_country] => US [patent_app_date] => 2012-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7813 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13413522 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/413522
DELAY ADJUSTMENT DEVICE, SEMICONDUCTOR DEVICE AND DELAY ADJUSTMENT METHOD Mar 5, 2012 Abandoned
Array ( [id] => 8534737 [patent_doc_number] => 08310896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Memory system and method of writing into nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 13/368693 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7333 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368693 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/368693
Memory system and method of writing into nonvolatile semiconductor memory Feb 7, 2012 Issued
Array ( [id] => 8941878 [patent_doc_number] => 20130191675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'METHOD AND SYSTEM FOR PROVIDING BACKUP POWER FOR MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/356755 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356755 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/356755
METHOD AND SYSTEM FOR PROVIDING BACKUP POWER FOR MEMORY DEVICES Jan 23, 2012 Abandoned
Array ( [id] => 8926760 [patent_doc_number] => 20130182520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'MEMORY DEVICE BASED ON CONDUCTANCE SWITCHING IN POLYMER/ELECTROLYTE JUNCTIONS' [patent_app_type] => utility [patent_app_number] => 13/352597 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13352597 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/352597
Memory device based on conductance switching in polymer/electrolyte junctions Jan 17, 2012 Issued
Array ( [id] => 8300220 [patent_doc_number] => 20120182779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/351737 [patent_app_country] => US [patent_app_date] => 2012-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351737 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/351737
SEMICONDUCTOR MEMORY DEVICE Jan 16, 2012 Abandoned
Array ( [id] => 10041782 [patent_doc_number] => 09082494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Memory cells having a common gate terminal' [patent_app_type] => utility [patent_app_number] => 13/350061 [patent_app_country] => US [patent_app_date] => 2012-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6447 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350061 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/350061
Memory cells having a common gate terminal Jan 12, 2012 Issued
Array ( [id] => 10178625 [patent_doc_number] => 09208836 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Chip-to-chip signaling with improved bandwidth utilization' [patent_app_type] => utility [patent_app_number] => 13/345987 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 14345 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13345987 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/345987
Chip-to-chip signaling with improved bandwidth utilization Jan 8, 2012 Issued
Array ( [id] => 8276490 [patent_doc_number] => 20120170361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'LOW-COST NON-VOLATILE FLASH-RAM MEMORY' [patent_app_type] => utility [patent_app_number] => 13/345600 [patent_app_country] => US [patent_app_date] => 2012-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12817 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13345600 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/345600
Low-cost non-volatile flash-RAM memory Jan 5, 2012 Issued
Array ( [id] => 10015857 [patent_doc_number] => 09058878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Read methods of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/341303 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7050 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341303 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341303
Read methods of semiconductor memory device Dec 29, 2011 Issued
Array ( [id] => 8790685 [patent_doc_number] => 20130107654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS, HIGH VOLTAGE GENERATION CIRCUIT, AND PROGRAM METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/340795 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3574 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340795
SEMICONDUCTOR MEMORY APPARATUS, HIGH VOLTAGE GENERATION CIRCUIT, AND PROGRAM METHOD THEREOF Dec 29, 2011 Abandoned
Array ( [id] => 10839597 [patent_doc_number] => 08867282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Semiconductor apparatus with open bit line structure' [patent_app_type] => utility [patent_app_number] => 13/339183 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2740 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339183
Semiconductor apparatus with open bit line structure Dec 27, 2011 Issued
Array ( [id] => 8322724 [patent_doc_number] => 20120195133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING DATA COMPRESSION TEST CICUIT' [patent_app_type] => utility [patent_app_number] => 13/337657 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3184 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337657 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/337657
Semiconductor memory device having data compression test circuit Dec 26, 2011 Issued
Array ( [id] => 9324918 [patent_doc_number] => 08659948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Techniques for reading a memory cell with electrically floating body transistor' [patent_app_type] => utility [patent_app_number] => 13/336805 [patent_app_country] => US [patent_app_date] => 2011-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 17132 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13336805 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/336805
Techniques for reading a memory cell with electrically floating body transistor Dec 22, 2011 Issued
Array ( [id] => 9819361 [patent_doc_number] => 08929156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'System-in package including semiconductor memory device and method for determining input/output pins of system-in package' [patent_app_type] => utility [patent_app_number] => 13/336933 [patent_app_country] => US [patent_app_date] => 2011-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3915 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13336933 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/336933
System-in package including semiconductor memory device and method for determining input/output pins of system-in package Dec 22, 2011 Issued
Array ( [id] => 9985172 [patent_doc_number] => 09030900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-12 [patent_title] => 'Semiconductor device, semiconductor memory device and operation method thereof' [patent_app_type] => utility [patent_app_number] => 13/333941 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8593 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13333941 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/333941
Semiconductor device, semiconductor memory device and operation method thereof Dec 20, 2011 Issued
Array ( [id] => 8263676 [patent_doc_number] => 20120163105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/331451 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5310 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/331451
Semiconductor storage device with wiring that conserves space Dec 19, 2011 Issued
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