Christopher A. Johnson

Array ( [id] => 20148329 [patent_doc_number] => 12382689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Method for making DMOS devices including a superlattice and field plate for drift region diffusion [patent_app_type] => utility [patent_app_number] => 18/657928 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19956182 [patent_doc_number] => 12326593 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-10 [patent_title] => Techniques for singulating photonics die with optical quality edge [patent_app_type] => utility [patent_app_number] => 18/424201 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 1271 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19956182 [patent_doc_number] => 12326593 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-10 [patent_title] => Techniques for singulating photonics die with optical quality edge [patent_app_type] => utility [patent_app_number] => 18/424201 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 1271 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19305655 [patent_doc_number] => 20240234235 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => THERMALLY CONDUCTIVE SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME [patent_app_type] => utility [patent_app_number] => 18/381637 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19837563 [patent_doc_number] => 20250089349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => STRUCTURE WITH CAPACITOR AND FIN TRANSISTOR AND FABRICATING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/381639 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19305655 [patent_doc_number] => 20240234235 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => THERMALLY CONDUCTIVE SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME [patent_app_type] => utility [patent_app_number] => 18/381637 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19239470 [patent_doc_number] => 20240196666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/236136 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18835322 [patent_doc_number] => 20230403849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MICROELECTRONIC DEVICES WITH SUPPORT PILLARS SPACED ALONG A SLIT REGION BETWEEN PILLAR ARRAY BLOCKS, AND RELATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/366748 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18835322 [patent_doc_number] => 20230403849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MICROELECTRONIC DEVICES WITH SUPPORT PILLARS SPACED ALONG A SLIT REGION BETWEEN PILLAR ARRAY BLOCKS, AND RELATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/366748 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18835322 [patent_doc_number] => 20230403849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MICROELECTRONIC DEVICES WITH SUPPORT PILLARS SPACED ALONG A SLIT REGION BETWEEN PILLAR ARRAY BLOCKS, AND RELATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/366748 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18787173 [patent_doc_number] => 20230375416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Micro-Electro-Mechanical System (Mems) Thermal Sensor [patent_app_type] => utility [patent_app_number] => 18/228333 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18744127 [patent_doc_number] => 20230353115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => PROCESS FOR TRANSFERRING A THIN LAYER TO A SUPPORT SUBSTRATE THAT HAVE DIFFERENT THERMAL EXPANSION COEFFICIENTS [patent_app_type] => utility [patent_app_number] => 18/348940 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18698509 [patent_doc_number] => 20230328989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/209983 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18698509 [patent_doc_number] => 20230328989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/209983 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18698495 [patent_doc_number] => 20230328975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => Integrated Assemblies and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 18/207499 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18698495 [patent_doc_number] => 20230328975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => Integrated Assemblies and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 18/207499 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19118374 [patent_doc_number] => 20240130124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => ELECTRONIC DEVICES COMPRISING ADJOINING OXIDE MATERIALS AND RELATED SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/324068 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18633584 [patent_doc_number] => 20230292511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH SUPPORT STRUCTURES IN GATE LINE SLITS AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/199333 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18199333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18631494 [patent_doc_number] => 20230290396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/319834 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18631494 [patent_doc_number] => 20230290396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/319834 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319834 [rel_patent_id] =>[rel_patent_doc_number] =>)