
Christopher Anthony Daley
Examiner (ID: 14782, Phone: (571)272-3625 , Office: P/2184 )
| Most Active Art Unit | 2184 |
| Art Unit(s) | 2111, 2185, 2184 |
| Total Applications | 1074 |
| Issued Applications | 854 |
| Pending Applications | 71 |
| Abandoned Applications | 175 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20101961
[patent_doc_number] => 20250231897
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-17
[patent_title] => MICRO-SERVICE LOGIC NETWORK AND CONSTRUCTION METHOD AND APPARATUS THEREOF, DEVICE AND READABLE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 18/294661
[patent_app_country] => US
[patent_app_date] => 2022-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2209
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18294661
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/294661 | MICRO-SERVICE LOGIC NETWORK AND CONSTRUCTION METHOD AND APPARATUS THEREOF, DEVICE AND READABLE MEDIUM | Aug 10, 2022 | Pending |
Array
(
[id] => 18911812
[patent_doc_number] => 11874790
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-01-16
[patent_title] => System and method for checking data to be processed or stored
[patent_app_type] => utility
[patent_app_number] => 17/818663
[patent_app_country] => US
[patent_app_date] => 2022-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4441
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818663
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/818663 | System and method for checking data to be processed or stored | Aug 8, 2022 | Issued |
Array
(
[id] => 19259522
[patent_doc_number] => 12019576
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Systems and methods to transport memory mapped traffic amongst integrated circuit devices
[patent_app_type] => utility
[patent_app_number] => 17/879675
[patent_app_country] => US
[patent_app_date] => 2022-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 8796
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879675
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/879675 | Systems and methods to transport memory mapped traffic amongst integrated circuit devices | Aug 1, 2022 | Issued |
Array
(
[id] => 19703326
[patent_doc_number] => 12197351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Methods and systems for requesting atomic operations in a computing system
[patent_app_type] => utility
[patent_app_number] => 17/813780
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 23216
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813780
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813780 | Methods and systems for requesting atomic operations in a computing system | Jul 19, 2022 | Issued |
Array
(
[id] => 17962260
[patent_doc_number] => 20220342841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => DIE-TO-DIE ADAPTER
[patent_app_type] => utility
[patent_app_number] => 17/856050
[patent_app_country] => US
[patent_app_date] => 2022-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 32265
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856050
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/856050 | DIE-TO-DIE ADAPTER | Jun 30, 2022 | Pending |
Array
(
[id] => 17962260
[patent_doc_number] => 20220342841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => DIE-TO-DIE ADAPTER
[patent_app_type] => utility
[patent_app_number] => 17/856050
[patent_app_country] => US
[patent_app_date] => 2022-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 32265
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856050
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/856050 | DIE-TO-DIE ADAPTER | Jun 30, 2022 | Pending |
Array
(
[id] => 18220272
[patent_doc_number] => 11595230
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-28
[patent_title] => Signaling of time for communication between integrated circuits using multi-drop bus
[patent_app_type] => utility
[patent_app_number] => 17/854979
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 9879
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854979
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/854979 | Signaling of time for communication between integrated circuits using multi-drop bus | Jun 29, 2022 | Issued |
Array
(
[id] => 19963325
[patent_doc_number] => 12332826
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Die-to-die interconnect
[patent_app_type] => utility
[patent_app_number] => 17/852865
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 12514
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852865
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852865 | Die-to-die interconnect | Jun 28, 2022 | Issued |
Array
(
[id] => 18765658
[patent_doc_number] => 11816056
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-11-14
[patent_title] => Maintaining sensing state of a sensor and interfacing with device components
[patent_app_type] => utility
[patent_app_number] => 17/853677
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 24446
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853677
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853677 | Maintaining sensing state of a sensor and interfacing with device components | Jun 28, 2022 | Issued |
Array
(
[id] => 18123774
[patent_doc_number] => 20230009384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT
[patent_app_type] => utility
[patent_app_number] => 17/852165
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852165
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852165 | Memory component with input/output data rate alignment | Jun 27, 2022 | Issued |
Array
(
[id] => 18640040
[patent_doc_number] => 11764672
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-09-19
[patent_title] => Signal boosting in serial interfaces
[patent_app_type] => utility
[patent_app_number] => 17/809377
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5602
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809377
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809377 | Signal boosting in serial interfaces | Jun 27, 2022 | Issued |
Array
(
[id] => 18493462
[patent_doc_number] => 11698880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-11
[patent_title] => System on chip and device layer
[patent_app_type] => utility
[patent_app_number] => 17/845544
[patent_app_country] => US
[patent_app_date] => 2022-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6938
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845544
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/845544 | System on chip and device layer | Jun 20, 2022 | Issued |
Array
(
[id] => 18145220
[patent_doc_number] => 20230019075
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-19
[patent_title] => ELECTRONIC DEVICE INCLUDING A PLURALITY OF POWER MANAGEMENT INTEGRATED CIRCUITS AND METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/843245
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10299
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843245
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843245 | Electronic device including a plurality of power management integrated circuits and method of operating the same | Jun 16, 2022 | Issued |
Array
(
[id] => 18855668
[patent_doc_number] => 11853246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Electronic communication between devices using a protocol
[patent_app_type] => utility
[patent_app_number] => 17/664806
[patent_app_country] => US
[patent_app_date] => 2022-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7907
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664806
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/664806 | Electronic communication between devices using a protocol | May 23, 2022 | Issued |
Array
(
[id] => 20174498
[patent_doc_number] => 12393243
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Supercomputing device, in-place detection method for computing power board, and storage medium
[patent_app_type] => utility
[patent_app_number] => 18/565458
[patent_app_country] => US
[patent_app_date] => 2022-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 2419
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18565458
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/565458 | Supercomputing device, in-place detection method for computing power board, and storage medium | May 15, 2022 | Issued |
Array
(
[id] => 18999832
[patent_doc_number] => 11916696
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Electronic device including USB connecting terminal and method of operation thereof
[patent_app_type] => utility
[patent_app_number] => 17/742456
[patent_app_country] => US
[patent_app_date] => 2022-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9447
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742456
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/742456 | Electronic device including USB connecting terminal and method of operation thereof | May 11, 2022 | Issued |
Array
(
[id] => 18934488
[patent_doc_number] => 11886922
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-30
[patent_title] => Scheduling input/output operations for a storage system
[patent_app_type] => utility
[patent_app_number] => 17/732867
[patent_app_country] => US
[patent_app_date] => 2022-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 31
[patent_no_of_words] => 54484
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17732867
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/732867 | Scheduling input/output operations for a storage system | Apr 28, 2022 | Issued |
Array
(
[id] => 18741854
[patent_doc_number] => 20230350836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => ELECTRONIC DEVICE AND METHOD FOR SHARING DATA LANES OF A NETWORK INTERFACE DEVICE BETWEEN TWO OR MORE COMPUTING DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/730628
[patent_app_country] => US
[patent_app_date] => 2022-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5527
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730628
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/730628 | Electronic device and method for sharing data lanes of a network interface device between two or more computing devices | Apr 26, 2022 | Issued |
Array
(
[id] => 18981970
[patent_doc_number] => 11907143
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Method and device for timestamping and synchronization with high-accuracy timestamps in low-power sensor systems
[patent_app_type] => utility
[patent_app_number] => 17/720882
[patent_app_country] => US
[patent_app_date] => 2022-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 8651
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720882
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/720882 | Method and device for timestamping and synchronization with high-accuracy timestamps in low-power sensor systems | Apr 13, 2022 | Issued |
Array
(
[id] => 17915776
[patent_doc_number] => 20220318172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => Stacked Semiconductor Device Assembly in Computer System
[patent_app_type] => utility
[patent_app_number] => 17/718168
[patent_app_country] => US
[patent_app_date] => 2022-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17718168
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/718168 | Stacked semiconductor device assembly in computer system | Apr 10, 2022 | Issued |