Christopher B. Shin

Array ( [id] => 18189223 [patent_doc_number] => 11579808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Fabric driven non-volatile memory express subsystem zoning [patent_app_type] => utility [patent_app_number] => 17/318931 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4843 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18386213 [patent_doc_number] => 11656994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Non-volatile memory with optimized read [patent_app_type] => utility [patent_app_number] => 17/306073 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 14688 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17984719 [patent_doc_number] => 20220350756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT ATTRIBUTES SHARED USING ADDRESS BITS [patent_app_type] => utility [patent_app_number] => 17/306033 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18136230 [patent_doc_number] => 11561909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Bandwidth allocation for storage system commands in peer-to-peer environment [patent_app_type] => utility [patent_app_number] => 17/243348 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 16663 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18599093 [patent_doc_number] => 20230273893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHOD FOR DYNAMICALLY MODIFYING PCH PCIE ROOT PORT WHERE ONBOARD VGA IS LOCATED [patent_app_type] => utility [patent_app_number] => 18/028475 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18028475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19107831 [patent_doc_number] => 11960942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => System and method for identifying lock sequence conflicts [patent_app_type] => utility [patent_app_number] => 17/227698 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12271 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17201996 [patent_doc_number] => 20210342091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD OF ACCESSING A MEMORY, AND CORRESPONDING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/224747 [patent_app_country] => US [patent_app_date] => 2021-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17699071 [patent_doc_number] => 11372796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Bus subscriber and method for operating a bus subscriber [patent_app_type] => utility [patent_app_number] => 17/210792 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 10467 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17869129 [patent_doc_number] => 20220291866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => ADAPTIVE TURBO TOGGLING [patent_app_type] => utility [patent_app_number] => 17/198551 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18703365 [patent_doc_number] => 11789876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Device including peripheral interface and operating method of the device [patent_app_type] => utility [patent_app_number] => 17/191817 [patent_app_country] => US [patent_app_date] => 2021-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10957 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19566666 [patent_doc_number] => 12141438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Zero skipping techniques for reducing data movement [patent_app_type] => utility [patent_app_number] => 17/779523 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 12710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17779523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17832135 [patent_doc_number] => 20220269439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => ACCESS CONTROL FOR PROTECTION OF IN-MEMORY COMPUTATION [patent_app_type] => utility [patent_app_number] => 17/183903 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183903 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18015005 [patent_doc_number] => 11507301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory module implementing memory centric architecture [patent_app_type] => utility [patent_app_number] => 17/176860 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 12933 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18033081 [patent_doc_number] => 11516287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Method and apparatus for performing simple storage service seamless migration using index objects [patent_app_type] => utility [patent_app_number] => 17/167095 [patent_app_country] => US [patent_app_date] => 2021-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15669 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17009183 [patent_doc_number] => 20210240344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => WAFER-SCALE MEMORY TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/162796 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17907167 [patent_doc_number] => 11461021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Computing system and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/157316 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17446 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17084135 [patent_doc_number] => 20210279141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => RESTORE USING DEDUPLICATED SECONDARY COPY DATA [patent_app_type] => utility [patent_app_number] => 17/149438 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16931483 [patent_doc_number] => 20210197372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => ID NUMBER SETTING METHOD, COMPUTER-READABLE STORAGE MEDIUM AND MODULAR DEVICE [patent_app_type] => utility [patent_app_number] => 17/134155 [patent_app_country] => US [patent_app_date] => 2020-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17690509 [patent_doc_number] => 20220197802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SYSTEMS AND METHODS FOR MAINTAINING CACHE COHERENCY [patent_app_type] => utility [patent_app_number] => 17/129863 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18316517 [patent_doc_number] => 11630598 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-18 [patent_title] => Scheduling data replication operations [patent_app_type] => utility [patent_app_number] => 17/119199 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 40876 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119199 [rel_patent_id] =>[rel_patent_doc_number] =>)