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Christopher Brown

Examiner (ID: 19398)

Most Active Art Unit
1504
Art Unit(s)
2899, 1504
Total Applications
247
Issued Applications
157
Pending Applications
0
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1390691 [patent_doc_number] => 06552371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Telecommunications switch array with thyristor addressing' [patent_app_type] => B2 [patent_app_number] => 09/788298 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 10920 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552371.pdf [firstpage_image] =>[orig_patent_app_number] => 09788298 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788298
Telecommunications switch array with thyristor addressing Feb 15, 2001 Issued
Array ( [id] => 6522512 [patent_doc_number] => 20020109189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Method and structure for providing ESD protection for silicon on insulator integrated circuits' [patent_app_type] => new [patent_app_number] => 09/783869 [patent_app_country] => US [patent_app_date] => 2001-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2199 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20020109189.pdf [firstpage_image] =>[orig_patent_app_number] => 09783869 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/783869
Method and structure for providing ESD protection for silicon on insulator integrated circuits Feb 14, 2001 Abandoned
Array ( [id] => 6016385 [patent_doc_number] => 20020102787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Passivation for improved bipolar yield' [patent_app_type] => new [patent_app_number] => 09/773798 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3032 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20020102787.pdf [firstpage_image] =>[orig_patent_app_number] => 09773798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773798
Passivation for improved bipolar yield Jan 31, 2001 Issued
Array ( [id] => 1253282 [patent_doc_number] => 06670222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Texturing of a die pad surface for enhancing bonding strength in the surface attachment' [patent_app_type] => B1 [patent_app_number] => 09/772436 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7475 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670222.pdf [firstpage_image] =>[orig_patent_app_number] => 09772436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772436
Texturing of a die pad surface for enhancing bonding strength in the surface attachment Jan 28, 2001 Issued
Array ( [id] => 1066259 [patent_doc_number] => 06847091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Vertical semiconductor component having a reduced electrical surface field' [patent_app_type] => utility [patent_app_number] => 09/756539 [patent_app_country] => US [patent_app_date] => 2001-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1681 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847091.pdf [firstpage_image] =>[orig_patent_app_number] => 09756539 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/756539
Vertical semiconductor component having a reduced electrical surface field Jan 7, 2001 Issued
Array ( [id] => 6959547 [patent_doc_number] => 20010011739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Ferroelectric random access memory device' [patent_app_type] => new [patent_app_number] => 09/746459 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1757 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20010011739.pdf [firstpage_image] =>[orig_patent_app_number] => 09746459 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/746459
Ferroelectric random access memory device Dec 25, 2000 Abandoned
Array ( [id] => 1310388 [patent_doc_number] => 06613611 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'ASIC routing architecture with variable number of custom masks' [patent_app_type] => B1 [patent_app_number] => 09/747129 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 7362 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/613/06613611.pdf [firstpage_image] =>[orig_patent_app_number] => 09747129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/747129
ASIC routing architecture with variable number of custom masks Dec 21, 2000 Issued
Array ( [id] => 1069190 [patent_doc_number] => 06844595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Electrostatic discharge protection circuit with high triggering voltage' [patent_app_type] => utility [patent_app_number] => 09/747209 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 5401 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/844/06844595.pdf [firstpage_image] =>[orig_patent_app_number] => 09747209 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/747209
Electrostatic discharge protection circuit with high triggering voltage Dec 21, 2000 Issued
Array ( [id] => 1342585 [patent_doc_number] => 06593838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Planar inductor with segmented conductive plane' [patent_app_type] => B2 [patent_app_number] => 09/745068 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3067 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593838.pdf [firstpage_image] =>[orig_patent_app_number] => 09745068 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745068
Planar inductor with segmented conductive plane Dec 18, 2000 Issued
Array ( [id] => 6205400 [patent_doc_number] => 20020070425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'RF power bipolar junction transistor having performance-enhancing emitter structure' [patent_app_type] => new [patent_app_number] => 09/736888 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1482 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070425.pdf [firstpage_image] =>[orig_patent_app_number] => 09736888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736888
RF power bipolar junction transistor having performance-enhancing emitter structure Dec 12, 2000 Abandoned
Array ( [id] => 5981972 [patent_doc_number] => 20020096723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Transient frequency in dynamic threshold metal-oxide-semiconductor field effect transistors' [patent_app_type] => new [patent_app_number] => 09/732249 [patent_app_country] => US [patent_app_date] => 2000-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7974 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20020096723.pdf [firstpage_image] =>[orig_patent_app_number] => 09732249 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/732249
Transient frequency in dynamic threshold metal-oxide-semiconductor field effect transistors Dec 6, 2000 Abandoned
Array ( [id] => 1361461 [patent_doc_number] => 06569725 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Thin film transistor array and method for fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/722738 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 9538 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 524 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569725.pdf [firstpage_image] =>[orig_patent_app_number] => 09722738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/722738
Thin film transistor array and method for fabricating the same Nov 27, 2000 Issued
Array ( [id] => 1368735 [patent_doc_number] => 06570234 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Radiation resistant integrated circuit design' [patent_app_type] => B1 [patent_app_number] => 09/715819 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3198 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570234.pdf [firstpage_image] =>[orig_patent_app_number] => 09715819 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715819
Radiation resistant integrated circuit design Nov 16, 2000 Issued
Array ( [id] => 7610985 [patent_doc_number] => 06841872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Semiconductor package and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 09/709523 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 23 [patent_no_of_words] => 2840 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841872.pdf [firstpage_image] =>[orig_patent_app_number] => 09709523 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709523
Semiconductor package and fabrication method thereof Nov 12, 2000 Issued
Array ( [id] => 1015040 [patent_doc_number] => 06894384 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 09/705729 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 4464 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894384.pdf [firstpage_image] =>[orig_patent_app_number] => 09705729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/705729
Semiconductor device and method of manufacturing the same Nov 5, 2000 Issued
Array ( [id] => 1341190 [patent_doc_number] => 06586281 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Variable rotational assignment of interconnect levels in integrated circuit fabrication' [patent_app_type] => B1 [patent_app_number] => 09/703184 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4619 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586281.pdf [firstpage_image] =>[orig_patent_app_number] => 09703184 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/703184
Variable rotational assignment of interconnect levels in integrated circuit fabrication Oct 30, 2000 Issued
Array ( [id] => 1410988 [patent_doc_number] => 06534874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Semiconductor device and method of producing the same' [patent_app_type] => B1 [patent_app_number] => 09/688816 [patent_app_country] => US [patent_app_date] => 2000-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 5129 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534874.pdf [firstpage_image] =>[orig_patent_app_number] => 09688816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/688816
Semiconductor device and method of producing the same Oct 16, 2000 Issued
Array ( [id] => 1144838 [patent_doc_number] => 06777784 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Bipolar transistor-based electrostatic discharge (ESD) protection structure with a heat sink' [patent_app_type] => B1 [patent_app_number] => 09/690580 [patent_app_country] => US [patent_app_date] => 2000-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2131 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/777/06777784.pdf [firstpage_image] =>[orig_patent_app_number] => 09690580 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/690580
Bipolar transistor-based electrostatic discharge (ESD) protection structure with a heat sink Oct 16, 2000 Issued
Array ( [id] => 944303 [patent_doc_number] => 06967357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Voltage-driven power semiconductor device' [patent_app_type] => utility [patent_app_number] => 09/684904 [patent_app_country] => US [patent_app_date] => 2000-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 53 [patent_no_of_words] => 16813 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967357.pdf [firstpage_image] =>[orig_patent_app_number] => 09684904 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684904
Voltage-driven power semiconductor device Oct 9, 2000 Issued
Array ( [id] => 1108871 [patent_doc_number] => 06809348 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/675209 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 14356 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809348.pdf [firstpage_image] =>[orig_patent_app_number] => 09675209 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675209
Semiconductor device and method for manufacturing the same Sep 28, 2000 Issued
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