Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12760255 [patent_doc_number] => 20180145253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => Method of Forming Resistive Random Access Memory (RRAM) Cells [patent_app_type] => utility [patent_app_number] => 15/727776 [patent_app_country] => US [patent_app_date] => 2017-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3118 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15727776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/727776
Method of Forming Resistive Random Access Memory (RRAM) Cells Oct 8, 2017 Abandoned
Array ( [id] => 12693190 [patent_doc_number] => 20180122896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => NOVEL CHANNEL STOP IMP FOR THE FINFET DEVICE [patent_app_type] => utility [patent_app_number] => 15/728184 [patent_app_country] => US [patent_app_date] => 2017-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15728184 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/728184
Channel stop imp for the FinFET device Oct 8, 2017 Issued
Array ( [id] => 15250631 [patent_doc_number] => 10510845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Method for manufacturing electrode of semiconductor device [patent_app_type] => utility [patent_app_number] => 15/728160 [patent_app_country] => US [patent_app_date] => 2017-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4497 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15728160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/728160
Method for manufacturing electrode of semiconductor device Oct 8, 2017 Issued
Array ( [id] => 17152450 [patent_doc_number] => 11145541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Conductive via and metal line end fabrication and structures resulting therefrom [patent_app_type] => utility [patent_app_number] => 16/637930 [patent_app_country] => US [patent_app_date] => 2017-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11620 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637930 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637930
Conductive via and metal line end fabrication and structures resulting therefrom Sep 29, 2017 Issued
Array ( [id] => 15656813 [patent_doc_number] => 20200090937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/324220 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16324220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/324220
Method for manufacturing semiconductor device Sep 27, 2017 Issued
Array ( [id] => 13111981 [patent_doc_number] => 10074648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/718749 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5282 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718749 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718749
Method of manufacturing semiconductor device Sep 27, 2017 Issued
Array ( [id] => 12739498 [patent_doc_number] => 20180138333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => METHOD OF FORMING AN ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING A PHOTOVOLTAIC CELL USING THE SAME [patent_app_type] => utility [patent_app_number] => 15/711683 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711683
METHOD OF FORMING AN ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING A PHOTOVOLTAIC CELL USING THE SAME Sep 20, 2017 Abandoned
Array ( [id] => 15519235 [patent_doc_number] => 10566211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Continuous and pulsed RF plasma for etching metals [patent_app_type] => utility [patent_app_number] => 15/687775 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 20168 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687775 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687775
Continuous and pulsed RF plasma for etching metals Aug 27, 2017 Issued
Array ( [id] => 13528789 [patent_doc_number] => 20180315937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => ORGANIC THIN FILM TRANSISTOR AND METHOD FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 15/687619 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687619 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687619
Organic thin film transistor and method for making the same Aug 27, 2017 Issued
Array ( [id] => 12223278 [patent_doc_number] => 20180061639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/687915 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 46603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687915 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687915
Manufacturing method of semiconductor device Aug 27, 2017 Issued
Array ( [id] => 12314697 [patent_doc_number] => 09941285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Pattern forming method and semiconductor device manufacturing method using the same [patent_app_type] => utility [patent_app_number] => 15/687077 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 44 [patent_no_of_words] => 9542 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687077 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687077
Pattern forming method and semiconductor device manufacturing method using the same Aug 24, 2017 Issued
Array ( [id] => 12223352 [patent_doc_number] => 20180061712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'METHOD OF TRANSFERRING A SEMICONDUCTOR LAYER' [patent_app_type] => utility [patent_app_number] => 15/687304 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4419 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687304 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687304
Method of transferring a semiconductor layer Aug 24, 2017 Issued
Array ( [id] => 12990658 [patent_doc_number] => 20170345966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => METHOD OF PRODUCING A SEMICONDUCTOR BODY [patent_app_type] => utility [patent_app_number] => 15/675991 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675991 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675991
METHOD OF PRODUCING A SEMICONDUCTOR BODY Aug 13, 2017 Abandoned
Array ( [id] => 13799591 [patent_doc_number] => 20190013334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => MANUFACTURING METHOD FOR ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/558704 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15558704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/558704
MANUFACTURING METHOD FOR ARRAY SUBSTRATE Aug 10, 2017 Abandoned
Array ( [id] => 15733271 [patent_doc_number] => 10615069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Semiconductor structures comprising polymeric materials [patent_app_type] => utility [patent_app_number] => 15/667395 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 5855 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667395 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667395
Semiconductor structures comprising polymeric materials Aug 1, 2017 Issued
Array ( [id] => 16187030 [patent_doc_number] => 10720366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Method for manufacturing resistivity standard sample and method for measuring resistivity of epitaxial wafer [patent_app_type] => utility [patent_app_number] => 16/324435 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5481 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16324435 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/324435
Method for manufacturing resistivity standard sample and method for measuring resistivity of epitaxial wafer Jul 27, 2017 Issued
Array ( [id] => 14008489 [patent_doc_number] => 10222698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Chiplets with wicking posts [patent_app_type] => utility [patent_app_number] => 15/662214 [patent_app_country] => US [patent_app_date] => 2017-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 11119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662214 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/662214
Chiplets with wicking posts Jul 26, 2017 Issued
Array ( [id] => 14471467 [patent_doc_number] => 20190187376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/323238 [patent_app_country] => US [patent_app_date] => 2017-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16323238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/323238
Method for manufacturing a semiconductor structure Jul 26, 2017 Issued
Array ( [id] => 14542113 [patent_doc_number] => 20190206678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => METHOD FOR PRODUCING AN EPITAXIAL LAYER ON A GROWTH PLATE [patent_app_type] => utility [patent_app_number] => 16/324399 [patent_app_country] => US [patent_app_date] => 2017-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16324399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/324399
Method for producing an epitaxial layer on a growth plate Jul 24, 2017 Issued
Array ( [id] => 14475759 [patent_doc_number] => 20190189527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => Method and Device for Measurement of a Plurality of Semiconductor Chips in a Wafer Array [patent_app_type] => utility [patent_app_number] => 16/323237 [patent_app_country] => US [patent_app_date] => 2017-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6546 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16323237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/323237
Method and device for measurement of a plurality of semiconductor chips in a wafer array Jul 24, 2017 Issued
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