Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10758594
[patent_doc_number] => 20160104746
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-04-14
[patent_title] => 'METHODS OF FABRICATING A VARIABLE RESISTANCE MEMORY DEVICE USING MASKING AND SELECTIVE REMOVAL'
[patent_app_type] => utility
[patent_app_number] => 14/801030
[patent_app_country] => US
[patent_app_date] => 2015-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 9155
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14801030
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/801030 | METHODS OF FABRICATING A VARIABLE RESISTANCE MEMORY DEVICE USING MASKING AND SELECTIVE REMOVAL | Jul 15, 2015 | Abandoned |
Array
(
[id] => 10718061
[patent_doc_number] => 20160064208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'Radical-enhanced atomic layer deposition using CF4 to enhance oxygen radical generation'
[patent_app_type] => utility
[patent_app_number] => 14/744409
[patent_app_country] => US
[patent_app_date] => 2015-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4309
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744409
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/744409 | Radical-enhanced atomic layer deposition using CF4 to enhance oxygen radical generation | Jun 18, 2015 | Issued |
Array
(
[id] => 10576940
[patent_doc_number] => 09299590
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-03-29
[patent_title] => 'Integrated micro-peltier cooling components in silicon-on-insulator (SOI) layers'
[patent_app_type] => utility
[patent_app_number] => 14/743030
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 17
[patent_no_of_words] => 5372
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743030
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/743030 | Integrated micro-peltier cooling components in silicon-on-insulator (SOI) layers | Jun 17, 2015 | Issued |
Array
(
[id] => 10487168
[patent_doc_number] => 20150372188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-24
[patent_title] => 'METHOD FOR PRODUCING SEMICONDUCTOR LIGHT EMITTING ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 14/742716
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6359
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742716
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/742716 | Method for producing semiconductor light emitting element | Jun 17, 2015 | Issued |
Array
(
[id] => 10583981
[patent_doc_number] => 09306109
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-05
[patent_title] => 'Semiconductor device manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 14/742952
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3732
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742952
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/742952 | Semiconductor device manufacturing method | Jun 17, 2015 | Issued |
Array
(
[id] => 11353594
[patent_doc_number] => 20160372334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'SiARC REMOVAL WITH PLASMA ETCH AND FLUORINATED WET CHEMICAL SOLUTION COMBINATION'
[patent_app_type] => utility
[patent_app_number] => 14/743511
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5100
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743511
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/743511 | SiARC removal with plasma etch and fluorinated wet chemical solution combination | Jun 17, 2015 | Issued |
Array
(
[id] => 11811543
[patent_doc_number] => 09716117
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-25
[patent_title] => 'Method for producing a via, a method for producing an array substrate, an array substrate, and a display device'
[patent_app_type] => utility
[patent_app_number] => 14/743845
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 20
[patent_no_of_words] => 5470
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743845
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/743845 | Method for producing a via, a method for producing an array substrate, an array substrate, and a display device | Jun 17, 2015 | Issued |
Array
(
[id] => 11187480
[patent_doc_number] => 09418889
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-16
[patent_title] => 'Selective formation of dielectric barriers for metal interconnects in semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 14/742180
[patent_app_country] => US
[patent_app_date] => 2015-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 9583
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742180
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/742180 | Selective formation of dielectric barriers for metal interconnects in semiconductor devices | Jun 16, 2015 | Issued |
Array
(
[id] => 10479308
[patent_doc_number] => 20150364325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'TECHNIQUES FOR INCREASED DOPANT ACTIVATION IN COMPOUND SEMICONDUCTORS'
[patent_app_type] => utility
[patent_app_number] => 14/741784
[patent_app_country] => US
[patent_app_date] => 2015-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4219
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14741784
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/741784 | Techniques for increased dopant activation in compound semiconductors | Jun 16, 2015 | Issued |
Array
(
[id] => 10681594
[patent_doc_number] => 20160027739
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING ALIGNMENT MARKS TO ALIGN LAYERS'
[patent_app_type] => utility
[patent_app_number] => 14/736455
[patent_app_country] => US
[patent_app_date] => 2015-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10411
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14736455
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/736455 | Methods of manufacturing semiconductor devices using alignment marks to align layers | Jun 10, 2015 | Issued |
Array
(
[id] => 11666091
[patent_doc_number] => 20170154810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'METHOD FOR MAKING PATTERNS BY SELF-ASSEMBLY OF BLOCK COPOLYMERS'
[patent_app_type] => utility
[patent_app_number] => 15/313792
[patent_app_country] => US
[patent_app_date] => 2015-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7806
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15313792
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/313792 | Method for making patterns by self-assembly of block copolymers | May 20, 2015 | Issued |
Array
(
[id] => 10563774
[patent_doc_number] => 09287457
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-15
[patent_title] => 'Light emitting device and light emitting device package'
[patent_app_type] => utility
[patent_app_number] => 14/717464
[patent_app_country] => US
[patent_app_date] => 2015-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 9314
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717464
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/717464 | Light emitting device and light emitting device package | May 19, 2015 | Issued |
Array
(
[id] => 10358645
[patent_doc_number] => 20150243650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-27
[patent_title] => 'SEMICONDUCTOR DEVICE WITH RESISTANCE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/711589
[patent_app_country] => US
[patent_app_date] => 2015-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4450
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14711589
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/711589 | Semiconductor device with resistance circuit | May 12, 2015 | Issued |
Array
(
[id] => 11796829
[patent_doc_number] => 09406677
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-02
[patent_title] => 'Semiconductor devices and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/691037
[patent_app_country] => US
[patent_app_date] => 2015-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 18
[patent_no_of_words] => 7572
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14691037
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/691037 | Semiconductor devices and fabrication method thereof | Apr 19, 2015 | Issued |
Array
(
[id] => 10426238
[patent_doc_number] => 20150311249
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-29
[patent_title] => 'CHIP-SCALE PACKAGED LED DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/689315
[patent_app_country] => US
[patent_app_date] => 2015-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8980
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14689315
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/689315 | Chip-scale packaged LED device | Apr 16, 2015 | Issued |
Array
(
[id] => 10309402
[patent_doc_number] => 20150194403
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 14/663755
[patent_app_country] => US
[patent_app_date] => 2015-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3147
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663755
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/663755 | Semiconductor package | Mar 19, 2015 | Issued |
Array
(
[id] => 10725709
[patent_doc_number] => 20160071857
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-10
[patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/657174
[patent_app_country] => US
[patent_app_date] => 2015-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6599
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657174
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/657174 | Manufacturing method of semiconductor memory device | Mar 12, 2015 | Issued |
Array
(
[id] => 11014222
[patent_doc_number] => 20160211175
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-21
[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 14/656605
[patent_app_country] => US
[patent_app_date] => 2015-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3364
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656605
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/656605 | Method for fabricating semiconductor structure | Mar 11, 2015 | Issued |
Array
(
[id] => 10394698
[patent_doc_number] => 20150279705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-01
[patent_title] => 'Microwave Heating Method and Microwave Heating Apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/656164
[patent_app_country] => US
[patent_app_date] => 2015-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11357
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656164
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/656164 | Microwave Heating Method and Microwave Heating Apparatus | Mar 11, 2015 | Abandoned |
Array
(
[id] => 10666926
[patent_doc_number] => 20160013070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-14
[patent_title] => 'PATTERNING METHOD USING METAL MASK AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING THE SAME PATTERNING METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/656235
[patent_app_country] => US
[patent_app_date] => 2015-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11836
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656235
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/656235 | Patterning method using metal mask and method of fabricating semiconductor device including the same patterning method | Mar 11, 2015 | Issued |