Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9449524
[patent_doc_number] => 20140120694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'USE OF PLATE OXIDE LAYERS TO INCREASE BULK OXIDE THICKNESS IN SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/665414
[patent_app_country] => US
[patent_app_date] => 2012-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665414
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/665414 | Use of plate oxide layers to increase bulk oxide thickness in semiconductor devices | Oct 30, 2012 | Issued |
Array
(
[id] => 9575177
[patent_doc_number] => 08765590
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Insulative cap for borderless self-aligning contact in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/664955
[patent_app_country] => US
[patent_app_date] => 2012-10-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/664955 | Insulative cap for borderless self-aligning contact in semiconductor device | Oct 30, 2012 | Issued |
Array
(
[id] => 8814711
[patent_doc_number] => 20130115756
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'PROCESSING METHOD FOR SEMICONDUCTOR WAFER HAVING PASSIVATION FILM ON THE FRONT SIDE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/663035
[patent_app_country] => US
[patent_app_date] => 2012-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/663035 | PROCESSING METHOD FOR SEMICONDUCTOR WAFER HAVING PASSIVATION FILM ON THE FRONT SIDE THEREOF | Oct 28, 2012 | Abandoned |
Array
(
[id] => 8896643
[patent_doc_number] => 08476164
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-02
[patent_title] => 'Method of manufacturing semiconductor device with silicide'
[patent_app_type] => utility
[patent_app_number] => 13/661111
[patent_app_country] => US
[patent_app_date] => 2012-10-26
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/661111 | Method of manufacturing semiconductor device with silicide | Oct 25, 2012 | Issued |
Array
(
[id] => 8792186
[patent_doc_number] => 20130109155
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-02
[patent_title] => 'METHOD OF FORMING SEED LAYER AND METHOD OF FORMING SILICON-CONTAINING THIN FILM'
[patent_app_type] => utility
[patent_app_number] => 13/661153
[patent_app_country] => US
[patent_app_date] => 2012-10-26
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/661153 | Method of forming seed layer and method of forming silicon-containing thin film | Oct 25, 2012 | Issued |
Array
(
[id] => 8943985
[patent_doc_number] => 08497163
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-30
[patent_title] => 'Method for manufacturing a circuit device'
[patent_app_type] => utility
[patent_app_number] => 13/662017
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662017
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/662017 | Method for manufacturing a circuit device | Oct 25, 2012 | Issued |
Array
(
[id] => 9844180
[patent_doc_number] => 08946095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Method of forming interlayer dielectric film above metal gate of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/660363
[patent_app_country] => US
[patent_app_date] => 2012-10-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/660363 | Method of forming interlayer dielectric film above metal gate of semiconductor device | Oct 24, 2012 | Issued |
Array
(
[id] => 9446334
[patent_doc_number] => 20140117502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'METHOD FOR PROCESSING A SEMICONDUCTOR CARRIER, A SEMICONDUCTOR CHIP ARRANGEMENT AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/659956
[patent_app_country] => US
[patent_app_date] => 2012-10-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/659956 | Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing a semiconductor device | Oct 24, 2012 | Issued |
Array
(
[id] => 8968558
[patent_doc_number] => 08507369
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[patent_kind] => B2
[patent_issue_date] => 2013-08-13
[patent_title] => 'Method for producing silicon nanowire devices'
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[patent_app_number] => 13/659907
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/659907 | Method for producing silicon nanowire devices | Oct 23, 2012 | Issued |
Array
(
[id] => 8792195
[patent_doc_number] => 20130109164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-02
[patent_title] => 'REMOTE PLASMA RADICAL TREATMENT OF SILICON OXIDE'
[patent_app_type] => utility
[patent_app_number] => 13/658594
[patent_app_country] => US
[patent_app_date] => 2012-10-23
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/658594 | Remote plasma radical treatment of silicon oxide | Oct 22, 2012 | Issued |
Array
(
[id] => 9951068
[patent_doc_number] => 08999854
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[patent_kind] => B2
[patent_issue_date] => 2015-04-07
[patent_title] => 'Method for manufacturing silicon carbide semiconductor device'
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[patent_app_number] => 13/658583
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/658583 | Method for manufacturing silicon carbide semiconductor device | Oct 22, 2012 | Issued |
Array
(
[id] => 8780158
[patent_doc_number] => 20130102133
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[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'METHOD AND APPARATUS FOR FABRICATING SILICON HETEROJUNCTION SOLAR CELLS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656420 | Method and apparatus for fabricating silicon heterojunction solar cells | Oct 18, 2012 | Issued |
Array
(
[id] => 9413534
[patent_doc_number] => 08697571
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[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Power MOSFET contact metallization'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/654230 | Power MOSFET contact metallization | Oct 16, 2012 | Issued |
Array
(
[id] => 9094413
[patent_doc_number] => 20130273724
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[patent_title] => 'METHOD FOR CRYSTALLIZING AMORPHOUS SILICON THIN FILM AND METHOD FOR FABRICATING POLY CRYSTALLINE THIN FILM TRANSISTOR USING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/630148 | Method for crystallizing amorphous silicon thin film and method for fabricating poly crystalline thin film transistor using the same | Oct 15, 2012 | Issued |
Array
(
[id] => 9875198
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Array
(
[id] => 12554109
[patent_doc_number] => 10014261
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[patent_title] => Microchip charge patterning
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Array
(
[id] => 12168383
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[patent_issue_date] => 2018-02-06
[patent_title] => 'Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/651045 | Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same | Oct 11, 2012 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/645305 | Method of making a FinFET device | Oct 3, 2012 | Issued |