Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9449524 [patent_doc_number] => 20140120694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'USE OF PLATE OXIDE LAYERS TO INCREASE BULK OXIDE THICKNESS IN SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/665414 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665414 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/665414
Use of plate oxide layers to increase bulk oxide thickness in semiconductor devices Oct 30, 2012 Issued
Array ( [id] => 9575177 [patent_doc_number] => 08765590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Insulative cap for borderless self-aligning contact in semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/664955 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3591 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13664955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/664955
Insulative cap for borderless self-aligning contact in semiconductor device Oct 30, 2012 Issued
Array ( [id] => 8814711 [patent_doc_number] => 20130115756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'PROCESSING METHOD FOR SEMICONDUCTOR WAFER HAVING PASSIVATION FILM ON THE FRONT SIDE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/663035 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5610 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/663035
PROCESSING METHOD FOR SEMICONDUCTOR WAFER HAVING PASSIVATION FILM ON THE FRONT SIDE THEREOF Oct 28, 2012 Abandoned
Array ( [id] => 8896643 [patent_doc_number] => 08476164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-02 [patent_title] => 'Method of manufacturing semiconductor device with silicide' [patent_app_type] => utility [patent_app_number] => 13/661111 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2613 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661111
Method of manufacturing semiconductor device with silicide Oct 25, 2012 Issued
Array ( [id] => 8792186 [patent_doc_number] => 20130109155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'METHOD OF FORMING SEED LAYER AND METHOD OF FORMING SILICON-CONTAINING THIN FILM' [patent_app_type] => utility [patent_app_number] => 13/661153 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5499 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661153 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661153
Method of forming seed layer and method of forming silicon-containing thin film Oct 25, 2012 Issued
Array ( [id] => 8943985 [patent_doc_number] => 08497163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'Method for manufacturing a circuit device' [patent_app_type] => utility [patent_app_number] => 13/662017 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6352 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662017 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/662017
Method for manufacturing a circuit device Oct 25, 2012 Issued
Array ( [id] => 9844180 [patent_doc_number] => 08946095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Method of forming interlayer dielectric film above metal gate of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/660363 [patent_app_country] => US [patent_app_date] => 2012-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13660363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/660363
Method of forming interlayer dielectric film above metal gate of semiconductor device Oct 24, 2012 Issued
Array ( [id] => 9446334 [patent_doc_number] => 20140117502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'METHOD FOR PROCESSING A SEMICONDUCTOR CARRIER, A SEMICONDUCTOR CHIP ARRANGEMENT AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/659956 [patent_app_country] => US [patent_app_date] => 2012-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10427 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13659956 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/659956
Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing a semiconductor device Oct 24, 2012 Issued
Array ( [id] => 8968558 [patent_doc_number] => 08507369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Method for producing silicon nanowire devices' [patent_app_type] => utility [patent_app_number] => 13/659907 [patent_app_country] => US [patent_app_date] => 2012-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2348 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13659907 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/659907
Method for producing silicon nanowire devices Oct 23, 2012 Issued
Array ( [id] => 8792195 [patent_doc_number] => 20130109164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'REMOTE PLASMA RADICAL TREATMENT OF SILICON OXIDE' [patent_app_type] => utility [patent_app_number] => 13/658594 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8500 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658594 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/658594
Remote plasma radical treatment of silicon oxide Oct 22, 2012 Issued
Array ( [id] => 9951068 [patent_doc_number] => 08999854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Method for manufacturing silicon carbide semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/658583 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 7739 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658583 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/658583
Method for manufacturing silicon carbide semiconductor device Oct 22, 2012 Issued
Array ( [id] => 8780158 [patent_doc_number] => 20130102133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'METHOD AND APPARATUS FOR FABRICATING SILICON HETEROJUNCTION SOLAR CELLS' [patent_app_type] => utility [patent_app_number] => 13/656420 [patent_app_country] => US [patent_app_date] => 2012-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13656420 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/656420
Method and apparatus for fabricating silicon heterojunction solar cells Oct 18, 2012 Issued
Array ( [id] => 9413534 [patent_doc_number] => 08697571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Power MOSFET contact metallization' [patent_app_type] => utility [patent_app_number] => 13/654230 [patent_app_country] => US [patent_app_date] => 2012-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2318 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13654230 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/654230
Power MOSFET contact metallization Oct 16, 2012 Issued
Array ( [id] => 9094413 [patent_doc_number] => 20130273724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'METHOD FOR CRYSTALLIZING AMORPHOUS SILICON THIN FILM AND METHOD FOR FABRICATING POLY CRYSTALLINE THIN FILM TRANSISTOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/630148 [patent_app_country] => US [patent_app_date] => 2012-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15891 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630148 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630148
Method for crystallizing amorphous silicon thin film and method for fabricating poly crystalline thin film transistor using the same Oct 15, 2012 Issued
Array ( [id] => 9875198 [patent_doc_number] => 08962465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Methods of forming gated devices' [patent_app_type] => utility [patent_app_number] => 13/652305 [patent_app_country] => US [patent_app_date] => 2012-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 4911 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13652305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/652305
Methods of forming gated devices Oct 14, 2012 Issued
Array ( [id] => 12554109 [patent_doc_number] => 10014261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Microchip charge patterning [patent_app_type] => utility [patent_app_number] => 13/652194 [patent_app_country] => US [patent_app_date] => 2012-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2470 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13652194 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/652194
Microchip charge patterning Oct 14, 2012 Issued
Array ( [id] => 12168383 [patent_doc_number] => 09887155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/651045 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13651045 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/651045
Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same Oct 11, 2012 Issued
Array ( [id] => 8888611 [patent_doc_number] => 20130161795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, PROCESSING METHOD OF SEMICONDUCTOR WAFER, SEMICONDUCTOR WAFER' [patent_app_type] => utility [patent_app_number] => 13/650465 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 9393 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/650465
Manufacturing method of semiconductor device, processing method of semiconductor wafer, semiconductor wafer Oct 11, 2012 Issued
Array ( [id] => 9232728 [patent_doc_number] => 08598033 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-03 [patent_title] => 'Method for forming a salicide layer' [patent_app_type] => utility [patent_app_number] => 13/646726 [patent_app_country] => US [patent_app_date] => 2012-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3325 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646726 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646726
Method for forming a salicide layer Oct 6, 2012 Issued
Array ( [id] => 8943999 [patent_doc_number] => 08497177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-30 [patent_title] => 'Method of making a FinFET device' [patent_app_type] => utility [patent_app_number] => 13/645305 [patent_app_country] => US [patent_app_date] => 2012-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13645305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/645305
Method of making a FinFET device Oct 3, 2012 Issued
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