Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10309337
[patent_doc_number] => 20150194338
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[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'Method For Preparing Ultra-thin Material On Insulator Through Adsorption By Doped Ultra-thin Layer'
[patent_app_type] => utility
[patent_app_number] => 13/825079
[patent_app_country] => US
[patent_app_date] => 2012-09-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/825079 | Method for preparing ultra-thin material on insulator through adsorption by doped ultra-thin layer | Sep 24, 2012 | Issued |
Array
(
[id] => 9205507
[patent_doc_number] => 20140004684
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[patent_issue_date] => 2014-01-02
[patent_title] => 'Method for Preparing GOI Chip Structure'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/825010 | Method for preparing GOI chip structure | Sep 24, 2012 | Issued |
Array
(
[id] => 8603964
[patent_doc_number] => 20130009276
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[patent_kind] => A1
[patent_issue_date] => 2013-01-10
[patent_title] => 'METHODS OF FILLING ISOLATION TRENCHES FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 13/616199
[patent_app_country] => US
[patent_app_date] => 2012-09-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/616199 | METHODS OF FILLING ISOLATION TRENCHES FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES | Sep 13, 2012 | Abandoned |
Array
(
[id] => 8519665
[patent_doc_number] => 20120319073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICE HAVING REDUCED BOTTOM CONTACT AREA AND METHOD OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/591891
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/591891 | Variable resistance memory device having reduced bottom contact area and method of forming the same | Aug 21, 2012 | Issued |
Array
(
[id] => 10870203
[patent_doc_number] => 08895399
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[patent_issue_date] => 2014-11-25
[patent_title] => 'Integrated circuit and method of forming sealed trench junction termination'
[patent_app_type] => utility
[patent_app_number] => 13/568410
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Array
(
[id] => 8493305
[patent_doc_number] => 20120292714
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[patent_kind] => A1
[patent_issue_date] => 2012-11-22
[patent_title] => 'STANDARD CELL, SEMICONDUCTOR DEVICE HAVING STANDARD CELLS, AND METHOD FOR LAYING OUT AND WIRING THE STANDARD CELL'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/563205 | Standard cell, semiconductor device having standard cells, and method for laying out and wiring the standard cell | Jul 30, 2012 | Issued |
Array
(
[id] => 8480842
[patent_doc_number] => 20120280249
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[patent_title] => 'METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS'
[patent_app_type] => utility
[patent_app_number] => 13/552303
[patent_app_country] => US
[patent_app_date] => 2012-07-18
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[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/552303 | Methods for improving the quality of structures comprising semiconductor materials | Jul 17, 2012 | Issued |
Array
(
[id] => 8738811
[patent_doc_number] => 08410582
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-02
[patent_title] => '3D polysilicon diode with low contact resistance and method for forming same'
[patent_app_type] => utility
[patent_app_number] => 13/479093
[patent_app_country] => US
[patent_app_date] => 2012-05-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/479093 | 3D polysilicon diode with low contact resistance and method for forming same | May 22, 2012 | Issued |
Array
(
[id] => 9435527
[patent_doc_number] => 20140113434
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[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'PROCESS FOR FORMING A CRACK IN A MATERIAL'
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[patent_app_number] => 14/114998
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/114998 | Process for forming a crack in a material | Apr 26, 2012 | Issued |
Array
(
[id] => 8994911
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[patent_title] => 'Method of manufacturing semiconductor device'
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[patent_app_number] => 13/455633
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/455633 | Method of manufacturing semiconductor device | Apr 24, 2012 | Issued |
13/454985 | SONOS TYPE STACKS FOR NONVOLATILE CHANGETRAP MEMORY DEVICES AND METHODS TO FORM THE SAME | Apr 23, 2012 | Abandoned |
Array
(
[id] => 9269280
[patent_doc_number] => 20140024197
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[patent_title] => 'NONVOLATILE STORAGE ELEMENT AND METHOD OF MANUFACTURING THEREOF'
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[patent_app_number] => 14/110163
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/110163 | Nonvolatile storage element and method of manufacturing thereof | Apr 10, 2012 | Issued |
Array
(
[id] => 9060473
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Array
(
[id] => 9370413
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/111655 | Method for producing a semiconductor body | Apr 3, 2012 | Issued |
Array
(
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Array
(
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Array
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Array
(
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Array
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Array
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