Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7997967 [patent_doc_number] => 08080831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Semiconductor device and manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/784560 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 59 [patent_no_of_words] => 21997 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/080/08080831.pdf [firstpage_image] =>[orig_patent_app_number] => 12784560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/784560
Semiconductor device and manufacturing the same May 20, 2010 Issued
Array ( [id] => 6508150 [patent_doc_number] => 20100219523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/777023 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5204 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20100219523.pdf [firstpage_image] =>[orig_patent_app_number] => 12777023 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777023
Stackable integrated circuit package system May 9, 2010 Issued
Array ( [id] => 6495056 [patent_doc_number] => 20100200985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process' [patent_app_type] => utility [patent_app_number] => 12/763378 [patent_app_country] => US [patent_app_date] => 2010-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3050 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200985.pdf [firstpage_image] =>[orig_patent_app_number] => 12763378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/763378
Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process Apr 19, 2010 Abandoned
Array ( [id] => 6495056 [patent_doc_number] => 20100200985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process' [patent_app_type] => utility [patent_app_number] => 12/763378 [patent_app_country] => US [patent_app_date] => 2010-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3050 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200985.pdf [firstpage_image] =>[orig_patent_app_number] => 12763378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/763378
Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process Apr 19, 2010 Abandoned
Array ( [id] => 5944218 [patent_doc_number] => 20110104838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'LIQUID CRYSTAL DISPLAY AND METHOD OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/762571 [patent_app_country] => US [patent_app_date] => 2010-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7811 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20110104838.pdf [firstpage_image] =>[orig_patent_app_number] => 12762571 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/762571
Liquid crystal display and method of making the same Apr 18, 2010 Issued
Array ( [id] => 8726061 [patent_doc_number] => 08405183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Semiconductor structure' [patent_app_type] => utility [patent_app_number] => 12/760086 [patent_app_country] => US [patent_app_date] => 2010-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 33 [patent_no_of_words] => 17294 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12760086 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/760086
Semiconductor structure Apr 13, 2010 Issued
Array ( [id] => 4570949 [patent_doc_number] => 07829376 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-09 [patent_title] => 'Methods of forming zinc oxide based II-VI compound semiconductor layers with shallow acceptor conductivities' [patent_app_type] => utility [patent_app_number] => 12/755499 [patent_app_country] => US [patent_app_date] => 2010-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5207 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/829/07829376.pdf [firstpage_image] =>[orig_patent_app_number] => 12755499 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/755499
Methods of forming zinc oxide based II-VI compound semiconductor layers with shallow acceptor conductivities Apr 6, 2010 Issued
Array ( [id] => 6605321 [patent_doc_number] => 20100171183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE CARRYING OUT ION IMPLANTATION BEFORE SILICIDE PROCESS' [patent_app_type] => utility [patent_app_number] => 12/727334 [patent_app_country] => US [patent_app_date] => 2010-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5914 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171183.pdf [firstpage_image] =>[orig_patent_app_number] => 12727334 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/727334
Method of manufacturing semiconductor device carrying out ion implantation before silicide process Mar 18, 2010 Issued
Array ( [id] => 6427247 [patent_doc_number] => 20100151641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/713414 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5439 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20100151641.pdf [firstpage_image] =>[orig_patent_app_number] => 12713414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713414
Semiconductor device and method for manufacturing the same Feb 25, 2010 Issued
Array ( [id] => 8006753 [patent_doc_number] => 08084779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Casting for an LED module' [patent_app_type] => utility [patent_app_number] => 12/702574 [patent_app_country] => US [patent_app_date] => 2010-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1358 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084779.pdf [firstpage_image] =>[orig_patent_app_number] => 12702574 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/702574
Casting for an LED module Feb 8, 2010 Issued
Array ( [id] => 6240381 [patent_doc_number] => 20100133694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'METAL INTERCONNECT AND IC CHIP INCLUDING METAL INTERCONNECT' [patent_app_type] => utility [patent_app_number] => 12/701045 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2988 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20100133694.pdf [firstpage_image] =>[orig_patent_app_number] => 12701045 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701045
Metal interconnect and IC chip including metal interconnect Feb 4, 2010 Issued
Array ( [id] => 8560101 [patent_doc_number] => 08334164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Image sensor and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/691704 [patent_app_country] => US [patent_app_date] => 2010-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4306 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12691704 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/691704
Image sensor and fabrication method thereof Jan 20, 2010 Issued
Array ( [id] => 6317985 [patent_doc_number] => 20100112784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'LARGE AREA SEMICONDUCTOR ON GLASS INSULATOR' [patent_app_type] => utility [patent_app_number] => 12/652965 [patent_app_country] => US [patent_app_date] => 2010-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7842 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20100112784.pdf [firstpage_image] =>[orig_patent_app_number] => 12652965 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652965
LARGE AREA SEMICONDUCTOR ON GLASS INSULATOR Jan 5, 2010 Abandoned
Array ( [id] => 6126862 [patent_doc_number] => 20110086503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATES' [patent_app_type] => utility [patent_app_number] => 12/649559 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5111 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20110086503.pdf [firstpage_image] =>[orig_patent_app_number] => 12649559 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/649559
Method for fabricating semiconductor device with buried gates Dec 29, 2009 Issued
Array ( [id] => 8749404 [patent_doc_number] => 08415236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Methods for reducing loading effects during film formation' [patent_app_type] => utility [patent_app_number] => 12/648309 [patent_app_country] => US [patent_app_date] => 2009-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12648309 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/648309
Methods for reducing loading effects during film formation Dec 28, 2009 Issued
Array ( [id] => 4455731 [patent_doc_number] => 07892902 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-02-22 [patent_title] => 'Group III-V devices with multiple spacer layers' [patent_app_type] => utility [patent_app_number] => 12/653999 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 6712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/892/07892902.pdf [firstpage_image] =>[orig_patent_app_number] => 12653999 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653999
Group III-V devices with multiple spacer layers Dec 21, 2009 Issued
Array ( [id] => 84494 [patent_doc_number] => 07741656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Semiconductor device and manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/644968 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 58 [patent_no_of_words] => 21967 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741656.pdf [firstpage_image] =>[orig_patent_app_number] => 12644968 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/644968
Semiconductor device and manufacturing the same Dec 21, 2009 Issued
Array ( [id] => 6580431 [patent_doc_number] => 20100097157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/644971 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 21954 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20100097157.pdf [firstpage_image] =>[orig_patent_app_number] => 12644971 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/644971
SEMICONDUCTOR DEVICE AND MANUFACTURING THE SAME Dec 21, 2009 Abandoned
Array ( [id] => 5971197 [patent_doc_number] => 20110151655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'METAL GATE FILL AND METHOD OF MAKING' [patent_app_type] => utility [patent_app_number] => 12/641560 [patent_app_country] => US [patent_app_date] => 2009-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151655.pdf [firstpage_image] =>[orig_patent_app_number] => 12641560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/641560
Metal gate fill and method of making Dec 17, 2009 Issued
Array ( [id] => 6082111 [patent_doc_number] => 20110143529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'METHOD OF FABRICATING HIGH-K/METAL GATE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/639630 [patent_app_country] => US [patent_app_date] => 2009-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20110143529.pdf [firstpage_image] =>[orig_patent_app_number] => 12639630 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/639630
Method of fabricating high-k/metal gate device Dec 15, 2009 Issued
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