Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4685606
[patent_doc_number] => 20080029787
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'PHOTOELECTRIC CONVERSION APPARATUS AND IMAGE PICKUP SYSTEM USING PHOTOELECTRIC CONVERSION APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 11/776289
[patent_app_country] => US
[patent_app_date] => 2007-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6469
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20080029787.pdf
[firstpage_image] =>[orig_patent_app_number] => 11776289
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/776289 | Photoelectric conversion apparatus and image pickup system using photoelectric conversion apparatus | Jul 10, 2007 | Issued |
Array
(
[id] => 5346116
[patent_doc_number] => 20090001477
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures'
[patent_app_type] => utility
[patent_app_number] => 11/770798
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4848
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20090001477.pdf
[firstpage_image] =>[orig_patent_app_number] => 11770798
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/770798 | Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures | Jun 28, 2007 | Abandoned |
Array
(
[id] => 5346231
[patent_doc_number] => 20090001592
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'METAL INTERCONNECT FORMING METHODS AND IC CHIP INCLUDING METAL INTERCONNECT'
[patent_app_type] => utility
[patent_app_number] => 11/770928
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2579
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20090001592.pdf
[firstpage_image] =>[orig_patent_app_number] => 11770928
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/770928 | Metal interconnect forming methods and IC chip including metal interconnect | Jun 28, 2007 | Issued |
Array
(
[id] => 4944104
[patent_doc_number] => 20080081429
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'Method for fabricating capacitor in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/824259
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2111
[patent_no_of_claims] => 14
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[pdf_file] => publications/A1/0081/20080081429.pdf
[firstpage_image] =>[orig_patent_app_number] => 11824259
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/824259 | Method for fabricating capacitor in semiconductor device | Jun 28, 2007 | Issued |
Array
(
[id] => 4944083
[patent_doc_number] => 20080081408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'Method For Manufacturing Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 11/770999
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 4106
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[pdf_file] => publications/A1/0081/20080081408.pdf
[firstpage_image] =>[orig_patent_app_number] => 11770999
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/770999 | Method for manufacturing semiconductor device | Jun 28, 2007 | Issued |
Array
(
[id] => 5346149
[patent_doc_number] => 20090001510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'AIR GAP IN INTEGRATED CIRCUIT INDUCTOR FABRICATION'
[patent_app_type] => utility
[patent_app_number] => 11/771298
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 4096
[patent_no_of_claims] => 21
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20090001510.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771298
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771298 | Air gap in integrated circuit inductor fabrication | Jun 28, 2007 | Issued |
Array
(
[id] => 4704670
[patent_doc_number] => 20080064194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'METHOD FOR FABRICATING FLASH MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/770679
[patent_app_country] => US
[patent_app_date] => 2007-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3488
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0064/20080064194.pdf
[firstpage_image] =>[orig_patent_app_number] => 11770679
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/770679 | METHOD FOR FABRICATING FLASH MEMORY DEVICE | Jun 27, 2007 | Abandoned |
Array
(
[id] => 4933000
[patent_doc_number] => 20080003775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Manufacturing method for semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/812478
[patent_app_country] => US
[patent_app_date] => 2007-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8968
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20080003775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11812478
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/812478 | Manufacturing method for semiconductor device | Jun 18, 2007 | Issued |
Array
(
[id] => 4768640
[patent_doc_number] => 20080054296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-06
[patent_title] => 'Nitride-based semiconductor light emitting device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/808368
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_claims] => 43
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[pdf_file] => publications/A1/0054/20080054296.pdf
[firstpage_image] =>[orig_patent_app_number] => 11808368
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/808368 | Nitride-based semiconductor light emitting device and method of manufacturing the same | Jun 7, 2007 | Issued |
Array
(
[id] => 4657676
[patent_doc_number] => 20080026537
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'Method for forming capacitor of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/808338
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 1633
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20080026537.pdf
[firstpage_image] =>[orig_patent_app_number] => 11808338
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/808338 | Method for forming capacitor of semiconductor device | Jun 7, 2007 | Issued |
Array
(
[id] => 4949472
[patent_doc_number] => 20080305598
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'ION IMPLANTATION DEVICE AND A METHOD OF SEMICONDUCTOR MANUFACTURING BY THE IMPLANTATION OF IONS DERIVED FROM CARBORANE MOLECULAR SPECIES'
[patent_app_type] => utility
[patent_app_number] => 11/759768
[patent_app_country] => US
[patent_app_date] => 2007-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] => publications/A1/0305/20080305598.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759768
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759768 | ION IMPLANTATION DEVICE AND A METHOD OF SEMICONDUCTOR MANUFACTURING BY THE IMPLANTATION OF IONS DERIVED FROM CARBORANE MOLECULAR SPECIES | Jun 6, 2007 | Abandoned |
Array
(
[id] => 4946970
[patent_doc_number] => 20080303096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'Semiconductor devices and methods of manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 11/810858
[patent_app_country] => US
[patent_app_date] => 2007-06-07
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[pdf_file] => publications/A1/0303/20080303096.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810858
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810858 | Semiconductor devices and methods of manufacture thereof | Jun 6, 2007 | Issued |
Array
(
[id] => 5163168
[patent_doc_number] => 20070284749
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'Semiconductor device having no cracks in one or more layers underlying a metal line layer and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/806562
[patent_app_country] => US
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[pdf_file] => publications/A1/0284/20070284749.pdf
[firstpage_image] =>[orig_patent_app_number] => 11806562
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/806562 | Semiconductor device having no cracks in one or more layers underlying a metal line layer | May 31, 2007 | Issued |
Array
(
[id] => 5088935
[patent_doc_number] => 20070228574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/806444
[patent_app_country] => US
[patent_app_date] => 2007-05-31
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[firstpage_image] =>[orig_patent_app_number] => 11806444
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/806444 | Semiconductor device with guard rings that are formed in each of the plural wiring layers | May 30, 2007 | Issued |
Array
(
[id] => 4733926
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[patent_country] => US
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[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753989 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | May 24, 2007 | Abandoned |
Array
(
[id] => 5060389
[patent_doc_number] => 20070222026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/798863
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[firstpage_image] =>[orig_patent_app_number] => 11798863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/798863 | Method of manufacturing semiconductor device | May 16, 2007 | Issued |
Array
(
[id] => 4612819
[patent_doc_number] => 07989251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-02
[patent_title] => 'Variable resistance memory device having reduced bottom contact area and method of forming the same'
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[patent_app_number] => 11/798459
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Array
(
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[patent_title] => 'MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR WAFER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/745889 | Manufacturing method for semiconductor device, semiconductor device and semiconductor wafer | May 7, 2007 | Issued |
Array
(
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[patent_issue_date] => 2013-06-25
[patent_title] => 'Power MOSFET contact metallization'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/799889 | Power MOSFET contact metallization | May 1, 2007 | Issued |
Array
(
[id] => 4859777
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[patent_issue_date] => 2008-10-30
[patent_title] => 'TRANSISTOR PERFORMANCE USING A TWO-STEP DAMAGE ANNEAL'
[patent_app_type] => utility
[patent_app_number] => 11/742229
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11742229
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/742229 | Transistor performance using a two-step damage anneal | Apr 29, 2007 | Issued |