Christopher E Dunay

Array ( [id] => 4988786 [patent_doc_number] => 20070155125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'METHOD FOR FORMING SHALLOW TRENCH ISOLATION OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/617209 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1389 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155125.pdf [firstpage_image] =>[orig_patent_app_number] => 11617209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5022939 [patent_doc_number] => 20070148905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'METHOD OF FORMING A TRENCH ISOLATION LAYER IN A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/616758 [patent_app_country] => US [patent_app_date] => 2006-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1521 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20070148905.pdf [firstpage_image] =>[orig_patent_app_number] => 11616758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4772008 [patent_doc_number] => 20080057666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/616018 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1449 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20080057666.pdf [firstpage_image] =>[orig_patent_app_number] => 11616018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4879873 [patent_doc_number] => 20080153256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Methods and systems for nitridation of STI liner oxide in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/644339 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153256.pdf [firstpage_image] =>[orig_patent_app_number] => 11644339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 359664 [patent_doc_number] => 07485543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method for manufacturing semiconductor device with overlay vernier' [patent_app_type] => utility [patent_app_number] => 11/642598 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 1494 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485543.pdf [firstpage_image] =>[orig_patent_app_number] => 11642598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 908253 [patent_doc_number] => 07332794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-19 [patent_title] => 'System and method for providing a self heating adjustable TiSi2 resistor' [patent_app_type] => utility [patent_app_number] => 11/639019 [patent_app_country] => US [patent_app_date] => 2006-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332794.pdf [firstpage_image] =>[orig_patent_app_number] => 11639019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5130017 [patent_doc_number] => 20070206414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'METHOD OF FABRICATING A MULTI-BIT MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 11/608089 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2048 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20070206414.pdf [firstpage_image] =>[orig_patent_app_number] => 11608089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4833492 [patent_doc_number] => 20080132039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'FORMATION AND TREATMENT OF EPITAXIAL LAYER CONTAINING SILICON AND CARBON' [patent_app_type] => utility [patent_app_number] => 11/566058 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6766 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20080132039.pdf [firstpage_image] =>[orig_patent_app_number] => 11566058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 74146 [patent_doc_number] => 07749892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Embedded nano UV blocking and diffusion barrier for improved reliability of copper/ultra low K interlevel dielectric electronic devices' [patent_app_type] => utility [patent_app_number] => 11/564358 [patent_app_country] => US [patent_app_date] => 2006-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 11366 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/749/07749892.pdf [firstpage_image] =>[orig_patent_app_number] => 11564358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 833444 [patent_doc_number] => 07396733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/605588 [patent_app_country] => US [patent_app_date] => 2006-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 26 [patent_no_of_words] => 6238 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/396/07396733.pdf [firstpage_image] =>[orig_patent_app_number] => 11605588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4464196 [patent_doc_number] => 07935610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Semiconductor device isolation structures' [patent_app_type] => utility [patent_app_number] => 11/604958 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3664 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/935/07935610.pdf [firstpage_image] =>[orig_patent_app_number] => 11604958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 151725 [patent_doc_number] => 07678692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Fabrication method for a damascene bit line contact plug' [patent_app_type] => utility [patent_app_number] => 11/564238 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 2601 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/678/07678692.pdf [firstpage_image] =>[orig_patent_app_number] => 11564238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 386617 [patent_doc_number] => 07303986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/602196 [patent_app_country] => US [patent_app_date] => 2006-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 62 [patent_no_of_words] => 15566 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/303/07303986.pdf [firstpage_image] =>[orig_patent_app_number] => 11602196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5023015 [patent_doc_number] => 20070148981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'ELECTRONIC MICROMODULE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/561699 [patent_app_country] => US [patent_app_date] => 2006-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5077 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20070148981.pdf [firstpage_image] =>[orig_patent_app_number] => 11561699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4988785 [patent_doc_number] => 20070155124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/593868 [patent_app_country] => US [patent_app_date] => 2006-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3010 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155124.pdf [firstpage_image] =>[orig_patent_app_number] => 11593868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5031643 [patent_doc_number] => 20070096182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'TRANSISTOR, MEOMORY CELL ARRAY AND METHOD OF MANUFACTURING A TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/556897 [patent_app_country] => US [patent_app_date] => 2006-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 59 [patent_no_of_words] => 12118 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11556897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 151357 [patent_doc_number] => 07682912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'III-V compound semiconductor device with a surface layer in access regions having charge of polarity opposite to channel charge and method of making the same' [patent_app_type] => utility [patent_app_number] => 11/554859 [patent_app_country] => US [patent_app_date] => 2006-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4837 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/682/07682912.pdf [firstpage_image] =>[orig_patent_app_number] => 11554859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 185231 [patent_doc_number] => 07645680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Method of manufacturing isolation layer pattern in a semiconductor device and isolation layer pattern using the same' [patent_app_type] => utility [patent_app_number] => 11/553978 [patent_app_country] => US [patent_app_date] => 2006-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2787 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/645/07645680.pdf [firstpage_image] =>[orig_patent_app_number] => 11553978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5154484 [patent_doc_number] => 20070037367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Apparatus for plasma doping' [patent_app_type] => utility [patent_app_number] => 11/585938 [patent_app_country] => US [patent_app_date] => 2006-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3722 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20070037367.pdf [firstpage_image] =>[orig_patent_app_number] => 11585938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 102387 [patent_doc_number] => 07723154 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-25 [patent_title] => 'Methods of forming zinc oxide based II-VI compound semiconductor layers with shallow acceptor conductivities' [patent_app_type] => utility [patent_app_number] => 11/551058 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5221 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723154.pdf [firstpage_image] =>[orig_patent_app_number] => 11551058 [rel_patent_id] =>[rel_patent_doc_number] =>)