Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5152097
[patent_doc_number] => 20070034979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'Microelectronic imaging units and methods of manufacturing microelectronic imaging units'
[patent_app_type] => utility
[patent_app_number] => 11/583031
[patent_app_country] => US
[patent_app_date] => 2006-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4350
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[pdf_file] => publications/A1/0034/20070034979.pdf
[firstpage_image] =>[orig_patent_app_number] => 11583031
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/583031 | Microelectronic imaging units | Oct 18, 2006 | Issued |
Array
(
[id] => 5051521
[patent_doc_number] => 20070032066
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/546285
[patent_app_country] => US
[patent_app_date] => 2006-10-12
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[pdf_file] => publications/A1/0032/20070032066.pdf
[firstpage_image] =>[orig_patent_app_number] => 11546285
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/546285 | Method of making wafer level package structure by grinding the backside thereof and then forming metal layer on the ground side | Oct 11, 2006 | Issued |
Array
(
[id] => 5031694
[patent_doc_number] => 20070096233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'CMOS IMAGE SENSOR'
[patent_app_type] => utility
[patent_app_number] => 11/548496
[patent_app_country] => US
[patent_app_date] => 2006-10-11
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[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0096/20070096233.pdf
[firstpage_image] =>[orig_patent_app_number] => 11548496
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/548496 | CMOS IMAGE SENSOR | Oct 10, 2006 | Abandoned |
Array
(
[id] => 5202433
[patent_doc_number] => 20070023912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Integrating metal with ultra low-k-dielectrics'
[patent_app_type] => utility
[patent_app_number] => 11/544167
[patent_app_country] => US
[patent_app_date] => 2006-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 49
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[patent_no_of_words] => 8321
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[firstpage_image] =>[orig_patent_app_number] => 11544167
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/544167 | Integrating metal with ultra low-k-dielectrics | Oct 4, 2006 | Abandoned |
Array
(
[id] => 4982962
[patent_doc_number] => 20070087520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-19
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/542219
[patent_app_country] => US
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[pdf_file] => publications/A1/0087/20070087520.pdf
[firstpage_image] =>[orig_patent_app_number] => 11542219
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/542219 | Method for manufacturing semiconductor device | Oct 3, 2006 | Issued |
Array
(
[id] => 8005879
[patent_doc_number] => 08084340
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[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Method of manufacturing semiconductor device and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/541728
[patent_app_country] => US
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[pdf_file] => patents/08/084/08084340.pdf
[firstpage_image] =>[orig_patent_app_number] => 11541728
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/541728 | Method of manufacturing semiconductor device and semiconductor device | Oct 2, 2006 | Issued |
Array
(
[id] => 4988783
[patent_doc_number] => 20070155122
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'TRENCH ISOLATION STRUCTURE HAVING DIFFERENT STRESS'
[patent_app_type] => utility
[patent_app_number] => 11/537809
[patent_app_country] => US
[patent_app_date] => 2006-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 7448
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[pdf_file] => publications/A1/0155/20070155122.pdf
[firstpage_image] =>[orig_patent_app_number] => 11537809
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/537809 | Trench isolation structure having different stress | Oct 1, 2006 | Issued |
Array
(
[id] => 132597
[patent_doc_number] => 07696050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Method of manufacturing semiconductor device carrying out ion implantation before silicide process'
[patent_app_type] => utility
[patent_app_number] => 11/537208
[patent_app_country] => US
[patent_app_date] => 2006-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 5839
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[pdf_file] => patents/07/696/07696050.pdf
[firstpage_image] =>[orig_patent_app_number] => 11537208
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/537208 | Method of manufacturing semiconductor device carrying out ion implantation before silicide process | Sep 28, 2006 | Issued |
Array
(
[id] => 8386668
[patent_doc_number] => 08264071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-11
[patent_title] => 'Power semiconductor module with overcurrent protective device'
[patent_app_type] => utility
[patent_app_number] => 11/527936
[patent_app_country] => US
[patent_app_date] => 2006-09-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/527936 | Power semiconductor module with overcurrent protective device | Sep 26, 2006 | Issued |
Array
(
[id] => 5171953
[patent_doc_number] => 20070072386
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[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Method of forming an alignment key having a capping layer and method of fabricating a semiconductor device using the same'
[patent_app_type] => utility
[patent_app_number] => 11/524318
[patent_app_country] => US
[patent_app_date] => 2006-09-21
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[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0072/20070072386.pdf
[firstpage_image] =>[orig_patent_app_number] => 11524318
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/524318 | Method of forming an alignment key having a capping layer and method of fabricating a semiconductor device using the same | Sep 20, 2006 | Issued |
Array
(
[id] => 7535654
[patent_doc_number] => 08049282
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Bipolar device having buried contacts'
[patent_app_type] => utility
[patent_app_number] => 11/533785
[patent_app_country] => US
[patent_app_date] => 2006-09-21
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[pdf_file] => patents/08/049/08049282.pdf
[firstpage_image] =>[orig_patent_app_number] => 11533785
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/533785 | Bipolar device having buried contacts | Sep 20, 2006 | Issued |
Array
(
[id] => 4499112
[patent_doc_number] => 07948011
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor'
[patent_app_type] => utility
[patent_app_number] => 11/523286
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/523286 | N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor | Sep 17, 2006 | Issued |
Array
(
[id] => 151637
[patent_doc_number] => 07678624
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/519514 | Semiconductor device and method for manufacturing same | Sep 11, 2006 | Issued |
Array
(
[id] => 5095745
[patent_doc_number] => 20070117354
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[patent_issue_date] => 2007-05-24
[patent_title] => 'Large area semiconductor on glass insulator'
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[firstpage_image] =>[orig_patent_app_number] => 11517908
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/517908 | Large area semiconductor on glass insulator | Sep 7, 2006 | Issued |
Array
(
[id] => 5120087
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[patent_title] => 'Semiconductor devices, CMOS image sensors, and methods of manufacturing same'
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Array
(
[id] => 5141981
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Array
(
[id] => 903089
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[patent_title] => 'Lamellar-derived microelectronic component array and method of fabrication'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/515284 | Lamellar-derived microelectronic component array and method of fabrication | Aug 31, 2006 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/515179 | Seal ring for mixed circuitry semiconductor devices | Aug 30, 2006 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/514694 | Method for enhancing electrode surface area in DRAM cell capacitors | Aug 30, 2006 | Issued |
Array
(
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[patent_title] => 'VERSATILE SYSTEM FOR CHARGE DISSIPATION IN THE FORMATION OF SEMICONDUCTOR DEVICE STRUCTURES'
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[firstpage_image] =>[orig_patent_app_number] => 11468648
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/468648 | Versatile system for charge dissipation in the formation of semiconductor device structures | Aug 29, 2006 | Issued |