Christopher E Dunay
Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875 |
Total Applications | 722 |
Issued Applications | 487 |
Pending Applications | 67 |
Abandoned Applications | 168 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5869033
[patent_doc_number] => 20060163650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Power semiconductor device with endless gate trenches'
[patent_app_type] => utility
[patent_app_number] => 11/338215
[patent_app_country] => US
[patent_app_date] => 2006-01-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0163/20060163650.pdf
[firstpage_image] =>[orig_patent_app_number] => 11338215
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/338215 | Power semiconductor device with endless gate trenches | Jan 23, 2006 | Abandoned |
Array
(
[id] => 5874572
[patent_doc_number] => 20060166471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Memory apparatus and production method'
[patent_app_type] => utility
[patent_app_number] => 11/329659
[patent_app_country] => US
[patent_app_date] => 2006-01-11
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11329659
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/329659 | Integrated circuit including a memory apparatus and production method | Jan 10, 2006 | Issued |
Array
(
[id] => 5631749
[patent_doc_number] => 20060148219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Method for photomask processing'
[patent_app_type] => utility
[patent_app_number] => 11/320589
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[firstpage_image] =>[orig_patent_app_number] => 11320589
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320589 | Method for photomask processing | Dec 29, 2005 | Abandoned |
Array
(
[id] => 5631717
[patent_doc_number] => 20060148187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Self-aligned bipolar semiconductor device and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/320579
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[firstpage_image] =>[orig_patent_app_number] => 11320579
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320579 | Self-aligned bipolar semiconductor device and fabrication method thereof | Dec 29, 2005 | Issued |
Array
(
[id] => 5631728
[patent_doc_number] => 20060148198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Method for forming device isolation region in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/320339
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0148/20060148198.pdf
[firstpage_image] =>[orig_patent_app_number] => 11320339
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320339 | Method for forming device isolation region in semiconductor device | Dec 28, 2005 | Abandoned |
Array
(
[id] => 803255
[patent_doc_number] => 07422959
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-09
[patent_title] => 'Method for forming isolation trench in a semiconductor substrate'
[patent_app_type] => utility
[patent_app_number] => 11/319228
[patent_app_country] => US
[patent_app_date] => 2005-12-28
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[pdf_file] => patents/07/422/07422959.pdf
[firstpage_image] =>[orig_patent_app_number] => 11319228
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/319228 | Method for forming isolation trench in a semiconductor substrate | Dec 27, 2005 | Issued |
Array
(
[id] => 7967545
[patent_doc_number] => 07939841
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-10
[patent_title] => 'High output light emitting diode and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/318505
[patent_app_country] => US
[patent_app_date] => 2005-12-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/939/07939841.pdf
[firstpage_image] =>[orig_patent_app_number] => 11318505
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/318505 | High output light emitting diode and method for fabricating the same | Dec 27, 2005 | Issued |
Array
(
[id] => 5022960
[patent_doc_number] => 20070148926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Dual halo implant for improving short channel effect in three-dimensional tri-gate transistors'
[patent_app_type] => utility
[patent_app_number] => 11/321128
[patent_app_country] => US
[patent_app_date] => 2005-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 1779
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[pdf_file] => publications/A1/0148/20070148926.pdf
[firstpage_image] =>[orig_patent_app_number] => 11321128
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/321128 | Dual halo implant for improving short channel effect in three-dimensional tri-gate transistors | Dec 27, 2005 | Abandoned |
Array
(
[id] => 7741846
[patent_doc_number] => 08106437
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Semiconductor storage device'
[patent_app_type] => utility
[patent_app_number] => 11/311165
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/106/08106437.pdf
[firstpage_image] =>[orig_patent_app_number] => 11311165
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/311165 | Semiconductor storage device | Dec 19, 2005 | Issued |
Array
(
[id] => 363444
[patent_doc_number] => 07482255
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-27
[patent_title] => 'Method of ion implantation to reduce transient enhanced diffusion'
[patent_app_type] => utility
[patent_app_number] => 11/302499
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/07/482/07482255.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302499
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302499 | Method of ion implantation to reduce transient enhanced diffusion | Dec 13, 2005 | Issued |
Array
(
[id] => 5807812
[patent_doc_number] => 20060094167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Embedded ROM device using substrate leakage'
[patent_app_type] => utility
[patent_app_number] => 11/298011
[patent_app_country] => US
[patent_app_date] => 2005-12-09
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[pdf_file] => publications/A1/0094/20060094167.pdf
[firstpage_image] =>[orig_patent_app_number] => 11298011
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/298011 | Embedded ROM device using substrate leakage | Dec 8, 2005 | Abandoned |
Array
(
[id] => 5913048
[patent_doc_number] => 20060128110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
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Array
(
[id] => 236271
[patent_doc_number] => 07595252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-29
[patent_title] => 'Method of manufacturing a semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/295359 | Method of manufacturing a semiconductor memory device | Dec 4, 2005 | Issued |
Array
(
[id] => 5814239
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[patent_issue_date] => 2006-04-20
[patent_title] => 'Manufacturing method for crystalline semiconductor material and manufacturing method for semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 11293727
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/293727 | Manufacturing method for crystalline semiconductor material and manufacturing method for semiconductor device | Dec 1, 2005 | Issued |
Array
(
[id] => 852951
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[patent_title] => 'Plasma implantation of deuterium for passivation of semiconductor-device interfaces'
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Array
(
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Array
(
[id] => 352611
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[patent_issue_date] => 2009-02-17
[patent_title] => 'Buried subcollector for high frequency passive semiconductor devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/164108 | Buried subcollector for high frequency passive semiconductor devices | Nov 9, 2005 | Issued |
Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/266837 | Methods for creating electrophoretically insulated vias in semiconductive substrates | Nov 3, 2005 | Issued |