Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5637606 [patent_doc_number] => 20060068579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same' [patent_app_type] => utility [patent_app_number] => 10/954999 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13782 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20060068579.pdf [firstpage_image] =>[orig_patent_app_number] => 10954999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/954999
Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same Sep 28, 2004 Issued
Array ( [id] => 630373 [patent_doc_number] => 07132333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Transistor, memory cell array and method of manufacturing a transistor' [patent_app_type] => utility [patent_app_number] => 10/939255 [patent_app_country] => US [patent_app_date] => 2004-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 59 [patent_no_of_words] => 12114 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/132/07132333.pdf [firstpage_image] =>[orig_patent_app_number] => 10939255 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/939255
Transistor, memory cell array and method of manufacturing a transistor Sep 9, 2004 Issued
Array ( [id] => 5205155 [patent_doc_number] => 20070026637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Soi wafer and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 10/570668 [patent_app_country] => US [patent_app_date] => 2004-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7483 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20070026637.pdf [firstpage_image] =>[orig_patent_app_number] => 10570668 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/570668
SOI wafer and its manufacturing method Sep 7, 2004 Issued
Array ( [id] => 7601461 [patent_doc_number] => 07385243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Floating gate memory cell with a metallic source/drain and gate, and method for manufacturing such a floating gate memory gate cell' [patent_app_type] => utility [patent_app_number] => 10/926838 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5189 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/385/07385243.pdf [firstpage_image] =>[orig_patent_app_number] => 10926838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/926838
Floating gate memory cell with a metallic source/drain and gate, and method for manufacturing such a floating gate memory gate cell Aug 24, 2004 Issued
Array ( [id] => 448497 [patent_doc_number] => 07250332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Method for fabricating a semiconductor device having improved hot carrier immunity ability' [patent_app_type] => utility [patent_app_number] => 10/711038 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3718 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/250/07250332.pdf [firstpage_image] =>[orig_patent_app_number] => 10711038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711038
Method for fabricating a semiconductor device having improved hot carrier immunity ability Aug 18, 2004 Issued
Array ( [id] => 953845 [patent_doc_number] => 06958259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Method of stacking semiconductor element in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/919033 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3472 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958259.pdf [firstpage_image] =>[orig_patent_app_number] => 10919033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/919033
Method of stacking semiconductor element in a semiconductor device Aug 15, 2004 Issued
Array ( [id] => 542195 [patent_doc_number] => 07166503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Method of manufacturing a TFT with laser irradiation' [patent_app_type] => utility [patent_app_number] => 10/917373 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 35 [patent_no_of_words] => 7739 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/166/07166503.pdf [firstpage_image] =>[orig_patent_app_number] => 10917373 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/917373
Method of manufacturing a TFT with laser irradiation Aug 12, 2004 Issued
Array ( [id] => 7146807 [patent_doc_number] => 20050023255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Laser illumination system' [patent_app_type] => utility [patent_app_number] => 10/917454 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5807 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023255.pdf [firstpage_image] =>[orig_patent_app_number] => 10917454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/917454
Method of changing an energy attenuation factor of a linear light in order to crystallize a semiconductor film Aug 12, 2004 Issued
Array ( [id] => 6971890 [patent_doc_number] => 20050037600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Method for implanting ions into semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 10/918515 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6875 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20050037600.pdf [firstpage_image] =>[orig_patent_app_number] => 10918515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/918515
Method for implanting ions into semiconductor substrate Aug 11, 2004 Issued
Array ( [id] => 5881024 [patent_doc_number] => 20060030107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'CMOS compatible process with different-voltage devices' [patent_app_type] => utility [patent_app_number] => 10/914943 [patent_app_country] => US [patent_app_date] => 2004-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1382 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20060030107.pdf [firstpage_image] =>[orig_patent_app_number] => 10914943 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/914943
CMOS compatible process with different-voltage devices Aug 8, 2004 Issued
Array ( [id] => 7086667 [patent_doc_number] => 20050006779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => utility [patent_app_number] => 10/911458 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5373 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006779.pdf [firstpage_image] =>[orig_patent_app_number] => 10911458 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911458
Semiconductor device manufactured with auxillary mask and method for producing the same Aug 3, 2004 Issued
Array ( [id] => 826789 [patent_doc_number] => 07402453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'Microelectronic imaging units and methods of manufacturing microelectronic imaging units' [patent_app_type] => utility [patent_app_number] => 10/901851 [patent_app_country] => US [patent_app_date] => 2004-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4348 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/402/07402453.pdf [firstpage_image] =>[orig_patent_app_number] => 10901851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901851
Microelectronic imaging units and methods of manufacturing microelectronic imaging units Jul 27, 2004 Issued
Array ( [id] => 7097880 [patent_doc_number] => 20050130339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Protected switch and techniques to manufacture the same' [patent_app_type] => utility [patent_app_number] => 10/898428 [patent_app_country] => US [patent_app_date] => 2004-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3282 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20050130339.pdf [firstpage_image] =>[orig_patent_app_number] => 10898428 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/898428
Protected switch and techniques to manufacture the same Jul 21, 2004 Abandoned
Array ( [id] => 5793632 [patent_doc_number] => 20060014313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Microelectronic imaging units and methods of manufacturing microelectronic imaging units' [patent_app_type] => utility [patent_app_number] => 10/893022 [patent_app_country] => US [patent_app_date] => 2004-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4012 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20060014313.pdf [firstpage_image] =>[orig_patent_app_number] => 10893022 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/893022
Methods of manufacturing microelectronic imaging units with discrete standoffs Jul 15, 2004 Issued
Array ( [id] => 788133 [patent_doc_number] => 06987065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Method of manufacturing self aligned electrode with field insulation' [patent_app_type] => utility [patent_app_number] => 10/891038 [patent_app_country] => US [patent_app_date] => 2004-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 4545 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/987/06987065.pdf [firstpage_image] =>[orig_patent_app_number] => 10891038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/891038
Method of manufacturing self aligned electrode with field insulation Jul 14, 2004 Issued
Array ( [id] => 982594 [patent_doc_number] => 06927438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Nonvolatile ferroelectric memory device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/888585 [patent_app_country] => US [patent_app_date] => 2004-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 52 [patent_no_of_words] => 10661 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927438.pdf [firstpage_image] =>[orig_patent_app_number] => 10888585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/888585
Nonvolatile ferroelectric memory device and method for fabricating the same Jul 11, 2004 Issued
Array ( [id] => 7338692 [patent_doc_number] => 20040245646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Semiconductor device having no cracks in one or more layers underlying a metal line layer and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/885971 [patent_app_country] => US [patent_app_date] => 2004-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3820 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245646.pdf [firstpage_image] =>[orig_patent_app_number] => 10885971 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/885971
Semiconductor device having no cracks in one or more layers underlying a metal line layer and method of manufacturing the same Jul 7, 2004 Issued
Array ( [id] => 7089101 [patent_doc_number] => 20050009214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method for aligning a wafer and apparatus for performing the same' [patent_app_type] => utility [patent_app_number] => 10/883711 [patent_app_country] => US [patent_app_date] => 2004-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009214.pdf [firstpage_image] =>[orig_patent_app_number] => 10883711 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883711
Method for aligning a wafer and apparatus for performing the same Jul 5, 2004 Issued
Array ( [id] => 7275824 [patent_doc_number] => 20040235275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Semiconductor device and method for manufacturing same' [patent_app_type] => new [patent_app_number] => 10/882790 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6459 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20040235275.pdf [firstpage_image] =>[orig_patent_app_number] => 10882790 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882790
Semiconductor device and method for manufacturing same Jun 30, 2004 Issued
Array ( [id] => 553751 [patent_doc_number] => 07160814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Method for forming contact in semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/882698 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3579 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/160/07160814.pdf [firstpage_image] =>[orig_patent_app_number] => 10882698 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882698
Method for forming contact in semiconductor device Jun 28, 2004 Issued
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