Christopher E Dunay

Array ( [id] => 1089227 [patent_doc_number] => 06828252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Method of etching a contact opening' [patent_app_type] => B2 [patent_app_number] => 10/830274 [patent_app_country] => US [patent_app_date] => 2004-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4178 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828252.pdf [firstpage_image] =>[orig_patent_app_number] => 10830274 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6926009 [patent_doc_number] => 20050239264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Materials suitable for shallow trench isolation' [patent_app_type] => utility [patent_app_number] => 10/829048 [patent_app_country] => US [patent_app_date] => 2004-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5363 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20050239264.pdf [firstpage_image] =>[orig_patent_app_number] => 10829048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7428982 [patent_doc_number] => 20040209410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Beam irradiation apparatus, beam irradiation method, and method for manufacturing thin film transistor' [patent_app_type] => new [patent_app_number] => 10/827402 [patent_app_country] => US [patent_app_date] => 2004-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9759 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 28 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209410.pdf [firstpage_image] =>[orig_patent_app_number] => 10827402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 606419 [patent_doc_number] => 07153784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode' [patent_app_type] => utility [patent_app_number] => 10/828958 [patent_app_country] => US [patent_app_date] => 2004-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5124 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/153/07153784.pdf [firstpage_image] =>[orig_patent_app_number] => 10828958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 446214 [patent_doc_number] => 07253125 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-07 [patent_title] => 'Method to improve mechanical strength of low-k dielectric film using modulated UV exposure' [patent_app_type] => utility [patent_app_number] => 10/825888 [patent_app_country] => US [patent_app_date] => 2004-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5983 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/253/07253125.pdf [firstpage_image] =>[orig_patent_app_number] => 10825888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7089180 [patent_doc_number] => 20050009293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method of forming trench isolations' [patent_app_type] => utility [patent_app_number] => 10/822378 [patent_app_country] => US [patent_app_date] => 2004-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3561 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009293.pdf [firstpage_image] =>[orig_patent_app_number] => 10822378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7740353 [patent_doc_number] => 08105923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Sintered semiconductor material' [patent_app_type] => utility [patent_app_number] => 10/552548 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6079 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/105/08105923.pdf [firstpage_image] =>[orig_patent_app_number] => 10552548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 393923 [patent_doc_number] => 07297616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Methods, photoresists and substrates for ion-implant lithography' [patent_app_type] => utility [patent_app_number] => 10/822225 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11357 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/297/07297616.pdf [firstpage_image] =>[orig_patent_app_number] => 10822225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 456415 [patent_doc_number] => 07244634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Stress-relief layer and stress-compensation collar in contact arrays, and processes of making same' [patent_app_type] => utility [patent_app_number] => 10/815968 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8264 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/244/07244634.pdf [firstpage_image] =>[orig_patent_app_number] => 10815968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7329057 [patent_doc_number] => 20040253834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Method for fabricating a trench isolation structure' [patent_app_type] => new [patent_app_number] => 10/812418 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1433 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20040253834.pdf [firstpage_image] =>[orig_patent_app_number] => 10812418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 779642 [patent_doc_number] => 06995471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Self-passivated copper interconnect structure' [patent_app_type] => utility [patent_app_number] => 10/812734 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2261 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995471.pdf [firstpage_image] =>[orig_patent_app_number] => 10812734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 503117 [patent_doc_number] => 07205619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Method of producing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/806588 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 7452 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205619.pdf [firstpage_image] =>[orig_patent_app_number] => 10806588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7264111 [patent_doc_number] => 20040241973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Electrode, method of manufacturing the same, ferroelectric memory, and semiconductor device' [patent_app_type] => new [patent_app_number] => 10/805238 [patent_app_country] => US [patent_app_date] => 2004-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8837 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20040241973.pdf [firstpage_image] =>[orig_patent_app_number] => 10805238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 609527 [patent_doc_number] => 07151054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-19 [patent_title] => 'Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks' [patent_app_type] => utility [patent_app_number] => 10/805557 [patent_app_country] => US [patent_app_date] => 2004-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2427 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151054.pdf [firstpage_image] =>[orig_patent_app_number] => 10805557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7447443 [patent_doc_number] => 20040164289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Electromechanical three-trace junction devices' [patent_app_type] => new [patent_app_number] => 10/802900 [patent_app_country] => US [patent_app_date] => 2004-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8529 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164289.pdf [firstpage_image] =>[orig_patent_app_number] => 10802900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 542379 [patent_doc_number] => 07166518 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-23 [patent_title] => 'System and method for providing a self heating adjustable TiSi2 resistor' [patent_app_type] => utility [patent_app_number] => 10/801268 [patent_app_country] => US [patent_app_date] => 2004-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3930 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/166/07166518.pdf [firstpage_image] =>[orig_patent_app_number] => 10801268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7328915 [patent_doc_number] => 20040253791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Methods of fabricating a semiconductor device having MOS transistor with strained channel' [patent_app_type] => new [patent_app_number] => 10/799788 [patent_app_country] => US [patent_app_date] => 2004-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5678 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20040253791.pdf [firstpage_image] =>[orig_patent_app_number] => 10799788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6939276 [patent_doc_number] => 20050112839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method of selectively etching HSG layer in deep trench capacitor fabrication' [patent_app_type] => utility [patent_app_number] => 10/793928 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2296 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20050112839.pdf [firstpage_image] =>[orig_patent_app_number] => 10793928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7116762 [patent_doc_number] => 20050070063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'High performance MIS capacitor with HfO2 dielectric' [patent_app_type] => utility [patent_app_number] => 10/793818 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5089 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20050070063.pdf [firstpage_image] =>[orig_patent_app_number] => 10793818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 860359 [patent_doc_number] => 07371685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Low stress barrier layer removal' [patent_app_type] => utility [patent_app_number] => 10/794738 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 3218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/371/07371685.pdf [firstpage_image] =>[orig_patent_app_number] => 10794738 [rel_patent_id] =>[rel_patent_doc_number] =>)