Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 623985 [patent_doc_number] => 07138694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Single crystal silicon sensor with additional layer and method of producing the same' [patent_app_type] => utility [patent_app_number] => 10/791638 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3024 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/138/07138694.pdf [firstpage_image] =>[orig_patent_app_number] => 10791638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791638
Single crystal silicon sensor with additional layer and method of producing the same Mar 1, 2004 Issued
Array ( [id] => 708635 [patent_doc_number] => 07061048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Power MOSFET device' [patent_app_type] => utility [patent_app_number] => 10/790137 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 134 [patent_no_of_words] => 15397 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061048.pdf [firstpage_image] =>[orig_patent_app_number] => 10790137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/790137
Power MOSFET device Mar 1, 2004 Issued
Array ( [id] => 7143908 [patent_doc_number] => 20040169187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Side-emission type semiconductor light-emitting device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/792200 [patent_app_country] => US [patent_app_date] => 2004-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7325 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20040169187.pdf [firstpage_image] =>[orig_patent_app_number] => 10792200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/792200
Side-emission type semiconductor light-emitting device and manufacturing method thereof Feb 29, 2004 Issued
Array ( [id] => 7125091 [patent_doc_number] => 20050056835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Transparent amorphous carbon structure in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/789736 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7890 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20050056835.pdf [firstpage_image] =>[orig_patent_app_number] => 10789736 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789736
Transparent amorphous carbon structure in semiconductor devices Feb 26, 2004 Issued
Array ( [id] => 7423685 [patent_doc_number] => 20040229445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/784888 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3608 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20040229445.pdf [firstpage_image] =>[orig_patent_app_number] => 10784888 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/784888
Manufacturing method of semiconductor device with chamfering Feb 23, 2004 Issued
Array ( [id] => 7429255 [patent_doc_number] => 20040266075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for fabricating a low temperature polysilicon thin film transistor' [patent_app_type] => new [patent_app_number] => 10/781778 [patent_app_country] => US [patent_app_date] => 2004-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266075.pdf [firstpage_image] =>[orig_patent_app_number] => 10781778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781778
Method for fabricating a low temperature polysilicon thin film transistor Feb 19, 2004 Abandoned
Array ( [id] => 7430048 [patent_doc_number] => 20040266178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for forming metal interconnect of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/778388 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266178.pdf [firstpage_image] =>[orig_patent_app_number] => 10778388 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/778388
Method for forming metal interconnect of semiconductor device Feb 16, 2004 Issued
Array ( [id] => 500513 [patent_doc_number] => 07205234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Method of forming metal silicide' [patent_app_type] => utility [patent_app_number] => 10/772938 [patent_app_country] => US [patent_app_date] => 2004-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2037 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205234.pdf [firstpage_image] =>[orig_patent_app_number] => 10772938 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/772938
Method of forming metal silicide Feb 4, 2004 Issued
Array ( [id] => 7234925 [patent_doc_number] => 20040157355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Group III nitride semiconductor device' [patent_app_type] => new [patent_app_number] => 10/771528 [patent_app_country] => US [patent_app_date] => 2004-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9940 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157355.pdf [firstpage_image] =>[orig_patent_app_number] => 10771528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/771528
Group III nitride semiconductor device Feb 4, 2004 Issued
Array ( [id] => 6991056 [patent_doc_number] => 20050090093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Stress free etch processing in combination with a dynamic liquid meniscus' [patent_app_type] => utility [patent_app_number] => 10/769498 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9796 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20050090093.pdf [firstpage_image] =>[orig_patent_app_number] => 10769498 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769498
Stress free etch processing in combination with a dynamic liquid meniscus Jan 29, 2004 Issued
Array ( [id] => 7039506 [patent_doc_number] => 20050158924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Polycrystalline Silicon Layer With Nano-grain Structure and Method of Manufacture' [patent_app_type] => utility [patent_app_number] => 10/707878 [patent_app_country] => US [patent_app_date] => 2004-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20050158924.pdf [firstpage_image] =>[orig_patent_app_number] => 10707878 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707878
Polycrystalline silicon layer with nano-grain structure and method of manufacture Jan 19, 2004 Issued
Array ( [id] => 7039583 [patent_doc_number] => 20050158972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Method for manufacturing bit line contact structure of semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/759058 [patent_app_country] => US [patent_app_date] => 2004-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20050158972.pdf [firstpage_image] =>[orig_patent_app_number] => 10759058 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/759058
Method for manufacturing bit line contact structure of semiconductor memory Jan 19, 2004 Abandoned
Array ( [id] => 428624 [patent_doc_number] => 07268058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Tri-gate transistors and methods to fabricate same' [patent_app_type] => utility [patent_app_number] => 10/760028 [patent_app_country] => US [patent_app_date] => 2004-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/268/07268058.pdf [firstpage_image] =>[orig_patent_app_number] => 10760028 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/760028
Tri-gate transistors and methods to fabricate same Jan 15, 2004 Issued
Array ( [id] => 7116766 [patent_doc_number] => 20050070067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Methods of fabricating semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/758188 [patent_app_country] => US [patent_app_date] => 2004-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1739 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20050070067.pdf [firstpage_image] =>[orig_patent_app_number] => 10758188 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/758188
Methods of fabricating self-aligned source of flash memory device Jan 14, 2004 Issued
Array ( [id] => 432283 [patent_doc_number] => 07265056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Method for forming novel BARC open for precision critical dimension control' [patent_app_type] => utility [patent_app_number] => 10/754178 [patent_app_country] => US [patent_app_date] => 2004-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5734 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265056.pdf [firstpage_image] =>[orig_patent_app_number] => 10754178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/754178
Method for forming novel BARC open for precision critical dimension control Jan 8, 2004 Issued
Array ( [id] => 717089 [patent_doc_number] => 07053436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/752668 [patent_app_country] => US [patent_app_date] => 2004-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4423 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053436.pdf [firstpage_image] =>[orig_patent_app_number] => 10752668 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752668
Semiconductor device and method for fabricating the same Jan 7, 2004 Issued
Array ( [id] => 7338394 [patent_doc_number] => 20040245547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Ultra low-cost solid-state memory' [patent_app_type] => new [patent_app_number] => 10/751740 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 18294 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245547.pdf [firstpage_image] =>[orig_patent_app_number] => 10751740 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/751740
Ultra low-cost solid-state memory Jan 4, 2004 Issued
Array ( [id] => 7673236 [patent_doc_number] => 20040180543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/749878 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6228 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20040180543.pdf [firstpage_image] =>[orig_patent_app_number] => 10749878 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/749878
Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same Dec 29, 2003 Issued
Array ( [id] => 7234993 [patent_doc_number] => 20040157365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Method for packaging a multi-chip module of a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/751198 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1529 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157365.pdf [firstpage_image] =>[orig_patent_app_number] => 10751198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/751198
Method for packaging a multi-chip module of a semiconductor device Dec 29, 2003 Issued
Array ( [id] => 7677546 [patent_doc_number] => 20040152280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Methods for forming shallow trench isolation structures' [patent_app_type] => new [patent_app_number] => 10/748468 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1565 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20040152280.pdf [firstpage_image] =>[orig_patent_app_number] => 10748468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748468
Methods for forming shallow trench isolation structures Dec 29, 2003 Issued
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