Search

Christopher E Dunay

Examiner (ID: 1458, Phone: (571)270-1222 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875
Total Applications
722
Issued Applications
487
Pending Applications
67
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6834837 [patent_doc_number] => 20030162383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/365408 [patent_app_country] => US [patent_app_date] => 2003-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7798 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20030162383.pdf [firstpage_image] =>[orig_patent_app_number] => 10365408 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/365408
Semiconductor device and method for fabricating the same Feb 12, 2003 Issued
Array ( [id] => 1149962 [patent_doc_number] => 06774432 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL' [patent_app_type] => B1 [patent_app_number] => 10/358589 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8823 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774432.pdf [firstpage_image] =>[orig_patent_app_number] => 10358589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358589
UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL Feb 4, 2003 Issued
Array ( [id] => 7611036 [patent_doc_number] => 06841821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Non-volatile memory cell fabricated with slight modification to a conventional logic process and methods of operating same' [patent_app_type] => utility [patent_app_number] => 10/355477 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 7675 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841821.pdf [firstpage_image] =>[orig_patent_app_number] => 10355477 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/355477
Non-volatile memory cell fabricated with slight modification to a conventional logic process and methods of operating same Jan 30, 2003 Issued
Array ( [id] => 6668970 [patent_doc_number] => 20030113954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Method of making a semiconductor package having exposed metal strap' [patent_app_type] => new [patent_app_number] => 10/356046 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20030113954.pdf [firstpage_image] =>[orig_patent_app_number] => 10356046 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/356046
Method of making a semiconductor package having exposed metal strap Jan 30, 2003 Issued
Array ( [id] => 1232475 [patent_doc_number] => 06693359 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'High density wire bonding pads for semiconductor package' [patent_app_type] => B1 [patent_app_number] => 10/351328 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2621 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693359.pdf [firstpage_image] =>[orig_patent_app_number] => 10351328 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/351328
High density wire bonding pads for semiconductor package Jan 26, 2003 Issued
Array ( [id] => 7287301 [patent_doc_number] => 20040147097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'Metal reduction in wafer scribe area' [patent_app_type] => new [patent_app_number] => 10/351798 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3586 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20040147097.pdf [firstpage_image] =>[orig_patent_app_number] => 10351798 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/351798
Metal reduction in wafer scribe area Jan 26, 2003 Issued
Array ( [id] => 7283646 [patent_doc_number] => 20040145037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'Power semiconductor able of fast heat sinking' [patent_app_type] => new [patent_app_number] => 10/350058 [patent_app_country] => US [patent_app_date] => 2003-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1843 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20040145037.pdf [firstpage_image] =>[orig_patent_app_number] => 10350058 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/350058
Power semiconductor able of fast heat sinking Jan 23, 2003 Abandoned
Array ( [id] => 979381 [patent_doc_number] => 06930387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Dicing tape and die ejection method' [patent_app_type] => utility [patent_app_number] => 10/348638 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3063 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930387.pdf [firstpage_image] =>[orig_patent_app_number] => 10348638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/348638
Dicing tape and die ejection method Jan 21, 2003 Issued
Array ( [id] => 6856311 [patent_doc_number] => 20030129812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Vertical power component manufacturing method' [patent_app_type] => new [patent_app_number] => 10/346444 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1910 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20030129812.pdf [firstpage_image] =>[orig_patent_app_number] => 10346444 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/346444
Vertical power component Jan 16, 2003 Issued
Array ( [id] => 7324246 [patent_doc_number] => 20040137722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Structure and method for eliminating metal contact to P-well or N-well shorts or high leakage paths using polysilicon liner' [patent_app_type] => new [patent_app_number] => 10/345468 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20040137722.pdf [firstpage_image] =>[orig_patent_app_number] => 10345468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345468
Structure and method for eliminating metal contact to P-well or N-well shorts or high leakage paths using polysilicon liner Jan 14, 2003 Issued
Array ( [id] => 606401 [patent_doc_number] => 07153766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Metal barrier cap fabrication by polymer lift-off' [patent_app_type] => utility [patent_app_number] => 10/339188 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/153/07153766.pdf [firstpage_image] =>[orig_patent_app_number] => 10339188 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/339188
Metal barrier cap fabrication by polymer lift-off Jan 8, 2003 Issued
Array ( [id] => 1220499 [patent_doc_number] => 06703274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Buried strap with limited outdiffusion and vertical transistor DRAM' [patent_app_type] => B1 [patent_app_number] => 10/336988 [patent_app_country] => US [patent_app_date] => 2003-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2212 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703274.pdf [firstpage_image] =>[orig_patent_app_number] => 10336988 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/336988
Buried strap with limited outdiffusion and vertical transistor DRAM Jan 2, 2003 Issued
Array ( [id] => 1149968 [patent_doc_number] => 06774433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Non-volatile memory device with diffusion layer' [patent_app_type] => B2 [patent_app_number] => 10/330851 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6805 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774433.pdf [firstpage_image] =>[orig_patent_app_number] => 10330851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330851
Non-volatile memory device with diffusion layer Dec 25, 2002 Issued
Array ( [id] => 1050643 [patent_doc_number] => 06861728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Dielectric stack without interfacial layer' [patent_app_type] => utility [patent_app_number] => 10/326635 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5321 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/861/06861728.pdf [firstpage_image] =>[orig_patent_app_number] => 10326635 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/326635
Dielectric stack without interfacial layer Dec 19, 2002 Issued
Array ( [id] => 968527 [patent_doc_number] => 06939801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Selective deposition of a barrier layer on a dielectric material' [patent_app_type] => utility [patent_app_number] => 10/319788 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5780 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/939/06939801.pdf [firstpage_image] =>[orig_patent_app_number] => 10319788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319788
Selective deposition of a barrier layer on a dielectric material Dec 12, 2002 Issued
Array ( [id] => 7622100 [patent_doc_number] => 06977401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-20 [patent_title] => 'Magnetic memory device having magnetic shield layer, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/317141 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 115 [patent_no_of_words] => 13308 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/977/06977401.pdf [firstpage_image] =>[orig_patent_app_number] => 10317141 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317141
Magnetic memory device having magnetic shield layer, and manufacturing method thereof Dec 11, 2002 Issued
Array ( [id] => 1223757 [patent_doc_number] => 06699774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Wafer splitting method using cleavage' [patent_app_type] => B2 [patent_app_number] => 10/306008 [patent_app_country] => US [patent_app_date] => 2002-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 66 [patent_no_of_words] => 5672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/699/06699774.pdf [firstpage_image] =>[orig_patent_app_number] => 10306008 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306008
Wafer splitting method using cleavage Nov 28, 2002 Issued
Array ( [id] => 6683395 [patent_doc_number] => 20030119259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Method of forming a self-aligned floating gate in flash memory cell' [patent_app_type] => new [patent_app_number] => 10/306083 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3104 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20030119259.pdf [firstpage_image] =>[orig_patent_app_number] => 10306083 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306083
Method of forming a self-aligned floating gate in flash memory cell Nov 26, 2002 Issued
10/304440 MANUFACTURING METHODS OF LIQUID CRYSTAL DISPLAY Nov 25, 2002 Abandoned
Array ( [id] => 6711191 [patent_doc_number] => 20030170940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-11 [patent_title] => 'Simox substrate production process and simox substrate' [patent_app_type] => new [patent_app_number] => 10/296858 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4038 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20030170940.pdf [firstpage_image] =>[orig_patent_app_number] => 10296858 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/296858
Process for fabrication of a SIMOX substrate Nov 25, 2002 Issued
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