
Christopher E. Lee
Examiner (ID: 4808)
| Most Active Art Unit | 3992 |
| Art Unit(s) | 2111, 2181, 2189, 2112, 3992 |
| Total Applications | 369 |
| Issued Applications | 281 |
| Pending Applications | 10 |
| Abandoned Applications | 77 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7240590
[patent_doc_number] => 20050256986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Slave devices and methods for operating the same'
[patent_app_type] => utility
[patent_app_number] => 11/124271
[patent_app_country] => US
[patent_app_date] => 2005-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4013
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20050256986.pdf
[firstpage_image] =>[orig_patent_app_number] => 11124271
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/124271 | Slave devices and methods for operating the same | May 8, 2005 | Issued |
Array
(
[id] => 629755
[patent_doc_number] => 07136949
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-14
[patent_title] => 'Method and apparatus for position dependent data scheduling'
[patent_app_type] => utility
[patent_app_number] => 11/076867
[patent_app_country] => US
[patent_app_date] => 2005-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9196
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/136/07136949.pdf
[firstpage_image] =>[orig_patent_app_number] => 11076867
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/076867 | Method and apparatus for position dependent data scheduling | Mar 10, 2005 | Issued |
Array
(
[id] => 882008
[patent_doc_number] => 07360008
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-15
[patent_title] => 'Enforcing global ordering through a caching bridge in a multicore multiprocessor system'
[patent_app_type] => utility
[patent_app_number] => 11/026676
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2594
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/360/07360008.pdf
[firstpage_image] =>[orig_patent_app_number] => 11026676
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/026676 | Enforcing global ordering through a caching bridge in a multicore multiprocessor system | Dec 29, 2004 | Issued |
Array
(
[id] => 5633403
[patent_doc_number] => 20060149874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Method and apparatus of reducing transfer latency in an SOC interconnect'
[patent_app_type] => utility
[patent_app_number] => 11/027532
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5219
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0149/20060149874.pdf
[firstpage_image] =>[orig_patent_app_number] => 11027532
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/027532 | Method and apparatus of reducing transfer latency in an SOC interconnect | Dec 29, 2004 | Issued |
Array
(
[id] => 5650915
[patent_doc_number] => 20060136650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Data-read and write method of bridge interface'
[patent_app_type] => utility
[patent_app_number] => 11/012090
[patent_app_country] => US
[patent_app_date] => 2004-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2757
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20060136650.pdf
[firstpage_image] =>[orig_patent_app_number] => 11012090
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/012090 | Data-read and write method of bridge interface | Dec 15, 2004 | Abandoned |
Array
(
[id] => 469216
[patent_doc_number] => 07240136
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-03
[patent_title] => 'System and method for request priority transfer across nodes in a multi-tier data processing system network'
[patent_app_type] => utility
[patent_app_number] => 11/014070
[patent_app_country] => US
[patent_app_date] => 2004-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 7615
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/240/07240136.pdf
[firstpage_image] =>[orig_patent_app_number] => 11014070
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/014070 | System and method for request priority transfer across nodes in a multi-tier data processing system network | Dec 15, 2004 | Issued |
Array
(
[id] => 619653
[patent_doc_number] => 07146444
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-05
[patent_title] => 'Method and apparatus for prioritizing a high priority client'
[patent_app_type] => utility
[patent_app_number] => 11/009265
[patent_app_country] => US
[patent_app_date] => 2004-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 2577
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/146/07146444.pdf
[firstpage_image] =>[orig_patent_app_number] => 11009265
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/009265 | Method and apparatus for prioritizing a high priority client | Dec 8, 2004 | Issued |
Array
(
[id] => 725872
[patent_doc_number] => 07051142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Electronic device with card interface'
[patent_app_type] => utility
[patent_app_number] => 11/001309
[patent_app_country] => US
[patent_app_date] => 2004-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 8583
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/051/07051142.pdf
[firstpage_image] =>[orig_patent_app_number] => 11001309
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/001309 | Electronic device with card interface | Dec 1, 2004 | Issued |
Array
(
[id] => 7100256
[patent_doc_number] => 20050132115
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-16
[patent_title] => 'Host-client utility meter systems and methods for communicating with the same'
[patent_app_type] => utility
[patent_app_number] => 10/991789
[patent_app_country] => US
[patent_app_date] => 2004-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7409
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20050132115.pdf
[firstpage_image] =>[orig_patent_app_number] => 10991789
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/991789 | Host-client utility meter systems and methods for communicating with the same | Nov 17, 2004 | Issued |
Array
(
[id] => 615681
[patent_doc_number] => 07149832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'System and method for interrupt handling'
[patent_app_type] => utility
[patent_app_number] => 10/985360
[patent_app_country] => US
[patent_app_date] => 2004-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 13153
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/149/07149832.pdf
[firstpage_image] =>[orig_patent_app_number] => 10985360
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/985360 | System and method for interrupt handling | Nov 9, 2004 | Issued |
Array
(
[id] => 5722399
[patent_doc_number] => 20060075175
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-06
[patent_title] => 'Method and system for configuring high-speed serial links between components of a network device'
[patent_app_type] => utility
[patent_app_number] => 10/986100
[patent_app_country] => US
[patent_app_date] => 2004-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1767
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0075/20060075175.pdf
[firstpage_image] =>[orig_patent_app_number] => 10986100
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/986100 | Configurable high-speed serial links between components of a network device | Nov 9, 2004 | Issued |
Array
(
[id] => 447206
[patent_doc_number] => 07257654
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-08-14
[patent_title] => 'PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state'
[patent_app_type] => utility
[patent_app_number] => 10/983646
[patent_app_country] => US
[patent_app_date] => 2004-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6558
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/257/07257654.pdf
[firstpage_image] =>[orig_patent_app_number] => 10983646
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/983646 | PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state | Nov 8, 2004 | Issued |
Array
(
[id] => 5867143
[patent_doc_number] => 20060101274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-11
[patent_title] => 'Data transfer in an access system'
[patent_app_type] => utility
[patent_app_number] => 10/982430
[patent_app_country] => US
[patent_app_date] => 2004-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3736
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20060101274.pdf
[firstpage_image] =>[orig_patent_app_number] => 10982430
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/982430 | Data transfer in an access system | Nov 4, 2004 | Abandoned |
Array
(
[id] => 609428
[patent_doc_number] => 07155548
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-26
[patent_title] => 'Sequential device control with time-out function'
[patent_app_type] => utility
[patent_app_number] => 10/983136
[patent_app_country] => US
[patent_app_date] => 2004-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 1976
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/155/07155548.pdf
[firstpage_image] =>[orig_patent_app_number] => 10983136
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/983136 | Sequential device control with time-out function | Nov 3, 2004 | Issued |
Array
(
[id] => 5592252
[patent_doc_number] => 20060041705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-23
[patent_title] => 'SYSTEM AND METHOD FOR ARBITRATION BETWEEN SHARED PERIPHERAL CORE DEVICES IN SYSTEM ON CHIP ARCHITECTURES'
[patent_app_type] => utility
[patent_app_number] => 10/711084
[patent_app_country] => US
[patent_app_date] => 2004-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2279
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0041/20060041705.pdf
[firstpage_image] =>[orig_patent_app_number] => 10711084
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/711084 | SYSTEM AND METHOD FOR ARBITRATION BETWEEN SHARED PERIPHERAL CORE DEVICES IN SYSTEM ON CHIP ARCHITECTURES | Aug 19, 2004 | Abandoned |
Array
(
[id] => 535795
[patent_doc_number] => 07191269
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-13
[patent_title] => 'Method for multiple sensors to communicate on a uni-directional bus'
[patent_app_type] => utility
[patent_app_number] => 10/903543
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3430
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/191/07191269.pdf
[firstpage_image] =>[orig_patent_app_number] => 10903543
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/903543 | Method for multiple sensors to communicate on a uni-directional bus | Jul 29, 2004 | Issued |
Array
(
[id] => 6927437
[patent_doc_number] => 20050240694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Home electronic resources sharing system'
[patent_app_type] => utility
[patent_app_number] => 10/900106
[patent_app_country] => US
[patent_app_date] => 2004-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2762
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0240/20050240694.pdf
[firstpage_image] =>[orig_patent_app_number] => 10900106
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/900106 | Home electronic resources sharing system | Jul 27, 2004 | Abandoned |
Array
(
[id] => 609429
[patent_doc_number] => 07155549
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-26
[patent_title] => 'VMEbus split-read transaction'
[patent_app_type] => utility
[patent_app_number] => 10/899651
[patent_app_country] => US
[patent_app_date] => 2004-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 6123
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/155/07155549.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899651
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899651 | VMEbus split-read transaction | Jul 25, 2004 | Issued |
Array
(
[id] => 7140573
[patent_doc_number] => 20050182885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-18
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/898339
[patent_app_country] => US
[patent_app_date] => 2004-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6706
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0182/20050182885.pdf
[firstpage_image] =>[orig_patent_app_number] => 10898339
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/898339 | Semiconductor integrated circuit having changeable bus width of external data signal | Jul 25, 2004 | Issued |
Array
(
[id] => 5770675
[patent_doc_number] => 20060020726
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'Controlling enablement and disablement of computing device component'
[patent_app_type] => utility
[patent_app_number] => 10/899206
[patent_app_country] => US
[patent_app_date] => 2004-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5254
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020726.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899206
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899206 | Controlling enablement and disablement of computing device component | Jul 24, 2004 | Abandoned |