Christopher E. Lee

Array ( [id] => 1291742 [patent_doc_number] => 06643727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Isolation of I/O bus errors to a single partition in an LPAR environment' [patent_app_type] => B1 [patent_app_number] => 09/589664 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643727.pdf [firstpage_image] =>[orig_patent_app_number] => 09589664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 558837 [patent_doc_number] => 07177968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-13 [patent_title] => 'Data transmission system' [patent_app_type] => utility [patent_app_number] => 09/980098 [patent_app_country] => US [patent_app_date] => 2000-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 9459 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177968.pdf [firstpage_image] =>[orig_patent_app_number] => 09980098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 992630 [patent_doc_number] => 06920519 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-19 [patent_title] => 'System and method for supporting access to multiple I/O hub nodes in a host bridge' [patent_app_type] => utility [patent_app_number] => 09/569059 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5731 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/920/06920519.pdf [firstpage_image] =>[orig_patent_app_number] => 09569059 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7625724 [patent_doc_number] => 06769043 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'Ensuring fair access to upstream trunk bandwidth in ATM subtended configurations' [patent_app_type] => B1 [patent_app_number] => 09/546829 [patent_app_country] => US [patent_app_date] => 2000-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2747 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/769/06769043.pdf [firstpage_image] =>[orig_patent_app_number] => 09546829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 962175 [patent_doc_number] => 06952751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-04 [patent_title] => 'Method and apparatus for extending legacy computer systems' [patent_app_type] => utility [patent_app_number] => 09/544858 [patent_app_country] => US [patent_app_date] => 2000-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4006 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/952/06952751.pdf [firstpage_image] =>[orig_patent_app_number] => 09544858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1298013 [patent_doc_number] => 06631437 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Method and apparatus for promoting memory read commands' [patent_app_type] => B1 [patent_app_number] => 09/543817 [patent_app_country] => US [patent_app_date] => 2000-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7076 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/631/06631437.pdf [firstpage_image] =>[orig_patent_app_number] => 09543817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 684624 [patent_doc_number] => 07085875 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-01 [patent_title] => 'Modular switch with dynamic bus' [patent_app_type] => utility [patent_app_number] => 09/544054 [patent_app_country] => US [patent_app_date] => 2000-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9335 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085875.pdf [firstpage_image] =>[orig_patent_app_number] => 09544054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1112095 [patent_doc_number] => 06810438 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Method for enabling value-added feature on hardware devices using a confidential mechanism to access hardware registers in a batch manner' [patent_app_type] => B1 [patent_app_number] => 09/543701 [patent_app_country] => US [patent_app_date] => 2000-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2760 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/810/06810438.pdf [firstpage_image] =>[orig_patent_app_number] => 09543701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1540531 [patent_doc_number] => 06490647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Flushing stale data from a PCI bus system read prefetch buffer' [patent_app_type] => B1 [patent_app_number] => 09/542917 [patent_app_country] => US [patent_app_date] => 2000-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5758 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490647.pdf [firstpage_image] =>[orig_patent_app_number] => 09542917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 704935 [patent_doc_number] => 07069359 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-27 [patent_title] => 'Circuit and technique to stall the communication of data over a double pumped bus' [patent_app_type] => utility [patent_app_number] => 09/541780 [patent_app_country] => US [patent_app_date] => 2000-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4345 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/069/07069359.pdf [firstpage_image] =>[orig_patent_app_number] => 09541780 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 943495 [patent_doc_number] => 06970960 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-29 [patent_title] => 'Instream loader' [patent_app_type] => utility [patent_app_number] => 09/540105 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 10713 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970960.pdf [firstpage_image] =>[orig_patent_app_number] => 09540105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 785981 [patent_doc_number] => 06993621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-31 [patent_title] => 'Data storage system having separate data transfer section and message network with plural directors on a common printed circuit board and redundant switching networks' [patent_app_type] => utility [patent_app_number] => 09/540825 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 17702 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/993/06993621.pdf [firstpage_image] =>[orig_patent_app_number] => 09540825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1200895 [patent_doc_number] => 06728810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Data processing apparatus and bus control method therefor' [patent_app_type] => B1 [patent_app_number] => 09/540993 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 7841 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728810.pdf [firstpage_image] =>[orig_patent_app_number] => 09540993 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1043148 [patent_doc_number] => 06871252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-22 [patent_title] => 'Method and apparatus for logical detach for a hot-plug-in data bus' [patent_app_type] => utility [patent_app_number] => 09/540676 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 10 [patent_no_of_words] => 5283 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/871/06871252.pdf [firstpage_image] =>[orig_patent_app_number] => 09540676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1326695 [patent_doc_number] => 06609168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Bus master read request adaptive prefetch prediction method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/541131 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4390 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609168.pdf [firstpage_image] =>[orig_patent_app_number] => 09541131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1318974 [patent_doc_number] => 06618784 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Universal memory bus and card' [patent_app_type] => B1 [patent_app_number] => 09/539161 [patent_app_country] => US [patent_app_date] => 2000-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4091 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618784.pdf [firstpage_image] =>[orig_patent_app_number] => 09539161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 675916 [patent_doc_number] => 07093056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-15 [patent_title] => 'Method for the compilation of bus packets for isochronous data transmission via a data bus, and apparatus for carrying out the method' [patent_app_type] => utility [patent_app_number] => 09/937468 [patent_app_country] => US [patent_app_date] => 2000-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3685 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/093/07093056.pdf [firstpage_image] =>[orig_patent_app_number] => 09937468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1180864 [patent_doc_number] => 06754759 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Transfer of information between devices on different buses' [patent_app_type] => B1 [patent_app_number] => 09/520802 [patent_app_country] => US [patent_app_date] => 2000-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5216 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754759.pdf [firstpage_image] =>[orig_patent_app_number] => 09520802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1540521 [patent_doc_number] => 06490644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Limiting write data fracturing in PCI bus systems' [patent_app_type] => B1 [patent_app_number] => 09/521387 [patent_app_country] => US [patent_app_date] => 2000-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5781 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490644.pdf [firstpage_image] =>[orig_patent_app_number] => 09521387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1415462 [patent_doc_number] => 06549969 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Interlock for preventing human error in hot pluggable systems' [patent_app_type] => B1 [patent_app_number] => 09/515371 [patent_app_country] => US [patent_app_date] => 2000-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4117 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549969.pdf [firstpage_image] =>[orig_patent_app_number] => 09515371 [rel_patent_id] =>[rel_patent_doc_number] =>)