Search

Christopher G. Young

Examiner (ID: 3572, Phone: (571)272-1394 , Office: P/1721 )

Most Active Art Unit
1756
Art Unit(s)
1721, 1737, 1752, 1113, 1506, 1756, 1795
Total Applications
2931
Issued Applications
2607
Pending Applications
32
Abandoned Applications
298

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 820407 [patent_doc_number] => 07407736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Methods of improving single layer resist patterning scheme' [patent_app_type] => utility [patent_app_number] => 11/307289 [patent_app_country] => US [patent_app_date] => 2006-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2260 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/407/07407736.pdf [firstpage_image] =>[orig_patent_app_number] => 11307289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307289
Methods of improving single layer resist patterning scheme Jan 30, 2006 Issued
Array ( [id] => 7592917 [patent_doc_number] => 07652284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Process monitor mark and the method for using the same' [patent_app_type] => utility [patent_app_number] => 11/340910 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3919 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/652/07652284.pdf [firstpage_image] =>[orig_patent_app_number] => 11340910 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340910
Process monitor mark and the method for using the same Jan 26, 2006 Issued
Array ( [id] => 348640 [patent_doc_number] => 07494753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Method, program product and apparatus for improving calibration of resist models used in critical dimension calculation' [patent_app_type] => utility [patent_app_number] => 11/339827 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6791 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/494/07494753.pdf [firstpage_image] =>[orig_patent_app_number] => 11339827 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/339827
Method, program product and apparatus for improving calibration of resist models used in critical dimension calculation Jan 25, 2006 Issued
Array ( [id] => 5842851 [patent_doc_number] => 20060121374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Method for determining pattern misalignment over a substrate' [patent_app_type] => utility [patent_app_number] => 11/336492 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3449 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20060121374.pdf [firstpage_image] =>[orig_patent_app_number] => 11336492 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/336492
Method for determining pattern misalignment over a substrate Jan 19, 2006 Issued
Array ( [id] => 390151 [patent_doc_number] => 07300746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Photomask for forming small contact hole array and methods of fabricating and using the same' [patent_app_type] => utility [patent_app_number] => 11/328788 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 4879 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/300/07300746.pdf [firstpage_image] =>[orig_patent_app_number] => 11328788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/328788
Photomask for forming small contact hole array and methods of fabricating and using the same Jan 9, 2006 Issued
Array ( [id] => 851012 [patent_doc_number] => 07382912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Method and apparatus for performing target-image-based optical proximity correction' [patent_app_type] => utility [patent_app_number] => 11/325211 [patent_app_country] => US [patent_app_date] => 2006-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4100 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382912.pdf [firstpage_image] =>[orig_patent_app_number] => 11325211 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/325211
Method and apparatus for performing target-image-based optical proximity correction Jan 2, 2006 Issued
Array ( [id] => 5694332 [patent_doc_number] => 20060154479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Baking apparatus used in photolithography process, and method for controlling critical dimension of photoresist patterns using the same' [patent_app_type] => utility [patent_app_number] => 11/318508 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1580 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20060154479.pdf [firstpage_image] =>[orig_patent_app_number] => 11318508 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/318508
Baking apparatus used in photolithography process, and method for controlling critical dimension of photoresist patterns using the same Dec 27, 2005 Abandoned
Array ( [id] => 202245 [patent_doc_number] => 07632616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Controlling system and method for operating the same' [patent_app_type] => utility [patent_app_number] => 11/306417 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/632/07632616.pdf [firstpage_image] =>[orig_patent_app_number] => 11306417 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306417
Controlling system and method for operating the same Dec 27, 2005 Issued
Array ( [id] => 5625201 [patent_doc_number] => 20060263706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Overlay vernier and method for manufacturing semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/321131 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3187 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263706.pdf [firstpage_image] =>[orig_patent_app_number] => 11321131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321131
Overlay vernier and method for manufacturing semiconductor device using the same Dec 27, 2005 Abandoned
Array ( [id] => 5613823 [patent_doc_number] => 20060115751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Automated overlay metrology system' [patent_app_type] => utility [patent_app_number] => 11/316913 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4187 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20060115751.pdf [firstpage_image] =>[orig_patent_app_number] => 11316913 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316913
Automated overlay metrology system Dec 26, 2005 Issued
Array ( [id] => 5682819 [patent_doc_number] => 20060199089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/306380 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14088 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199089.pdf [firstpage_image] =>[orig_patent_app_number] => 11306380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306380
Method for manufacturing a semiconductor device Dec 26, 2005 Issued
Array ( [id] => 5631349 [patent_doc_number] => 20060147818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method of correcting deviations of critical dimensions of patterns formed on a wafer in a EUVL process' [patent_app_type] => utility [patent_app_number] => 11/319245 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3778 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20060147818.pdf [firstpage_image] =>[orig_patent_app_number] => 11319245 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319245
Method of correcting deviations of critical dimensions of patterns formed on a wafer in a EUVL process Dec 26, 2005 Issued
Array ( [id] => 204196 [patent_doc_number] => 07629092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Exposure system, exposure method and semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/312588 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 7023 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/629/07629092.pdf [firstpage_image] =>[orig_patent_app_number] => 11312588 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312588
Exposure system, exposure method and semiconductor device manufacturing method Dec 20, 2005 Issued
Array ( [id] => 5119772 [patent_doc_number] => 20070141486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Device manufacturing method and computer program product' [patent_app_type] => utility [patent_app_number] => 11/312650 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4326 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20070141486.pdf [firstpage_image] =>[orig_patent_app_number] => 11312650 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312650
Device manufacturing method and computer program product Dec 20, 2005 Issued
Array ( [id] => 5865393 [patent_doc_number] => 20060099523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Method for forming pattern using photomask' [patent_app_type] => utility [patent_app_number] => 11/312349 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 28882 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20060099523.pdf [firstpage_image] =>[orig_patent_app_number] => 11312349 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312349
Method for forming pattern using photomask Dec 20, 2005 Issued
Array ( [id] => 5807573 [patent_doc_number] => 20060093927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Pattern mask with features to minimize the effect of aberrations' [patent_app_type] => utility [patent_app_number] => 11/305197 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2809 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20060093927.pdf [firstpage_image] =>[orig_patent_app_number] => 11305197 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/305197
Pattern mask with features to minimize the effect of aberrations Dec 18, 2005 Abandoned
Array ( [id] => 5637329 [patent_doc_number] => 20060068302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'METHOD OF PATTERNING A SUBSTRATE BY FEEDING MASK DEFECT DATA FORWARD FOR SUBSEQUENT CORRECTION' [patent_app_type] => utility [patent_app_number] => 11/275178 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4307 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20060068302.pdf [firstpage_image] =>[orig_patent_app_number] => 11275178 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275178
Method of patterning a substrate by feeding mask defect data forward for subsequent correction Dec 15, 2005 Issued
Array ( [id] => 421755 [patent_doc_number] => 07273685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-25 [patent_title] => 'Method for controlling semiconductor device production process and a method for producing semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/304778 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 7700 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/273/07273685.pdf [firstpage_image] =>[orig_patent_app_number] => 11304778 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304778
Method for controlling semiconductor device production process and a method for producing semiconductor devices Dec 15, 2005 Issued
Array ( [id] => 5594710 [patent_doc_number] => 20060158626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Lithographic apparatus and device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/298942 [patent_app_country] => US [patent_app_date] => 2005-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8815 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20060158626.pdf [firstpage_image] =>[orig_patent_app_number] => 11298942 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/298942
Lithographic apparatus and device manufacturing method Dec 11, 2005 Issued
Array ( [id] => 232581 [patent_doc_number] => 07598006 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-10-06 [patent_title] => 'Method and apparatus for embedded encoding of overlay data ordering in an in-situ interferometer' [patent_app_type] => utility [patent_app_number] => 11/298129 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7900 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598006.pdf [firstpage_image] =>[orig_patent_app_number] => 11298129 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/298129
Method and apparatus for embedded encoding of overlay data ordering in an in-situ interferometer Dec 7, 2005 Issued
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